Low cost meander line chip monopole antenna

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journal

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Author(s)

Detail(s)

Original languageEnglish
Article number6648649
Pages (from-to)442-445
Journal / PublicationIEEE Transactions on Antennas and Propagation
Volume62
Issue number1
Publication statusPublished - Jan 2014

Abstract

A method for miniaturizing a chip antenna is presented in this communication. It uses a folded meander line and therefore the length is half. Also, two upper and lower loading patches are used to improve the performance of the chip antenna. The chip antenna has been miniaturized to 3.2 × 1.6 × 0.83 mm3 at resonance measured frequencies of 2.45 GHz and 2.73 GHz with and without external matching, respectively. An economic fabrication method for the chip antenna is discussed. It uses an inexpensive multilayer PCB with two low-cost prepregs and a common laminate. Only two plated-through holes are needed for the whole design. Good agreement between the simulated and measured results is observed. © 2013 IEEE.

Research Area(s)

  • Chip antenna, core, loading patch, meander line antenna, prepreg

Citation Format(s)

Low cost meander line chip monopole antenna. / Lee, Mike W. K.; Leung, K. W.; Chow, Y. L.

In: IEEE Transactions on Antennas and Propagation, Vol. 62, No. 1, 6648649, 01.2014, p. 442-445.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journal