Abstract
Reliability has been a challenge in the development of NAND flash memory, due to its technology size scaling and bit density improvement. To ensure the data integrity, error correction codes (ECC) with high error correction capability have been suggested. However, much higher costs will be introduced which cannot be supported for cost-limited consumer-level flash memory. Thus, low-cost ECCs are usually applied. In this work, a reliability improvement scheme is proposed for low-cost ECC enabled consumer-level flash memory. The scheme is motivated by the finding that low-cost ECC is able to protect shortened encoded data with improved reliability. This is because that the less the encoded data are, the less the errors will be occurred. With this motivation, a design is proposed to construct the shortened data case for a low-cost ECC when it cannot be able to provide the reliability requirement. Second, two relaxation approaches are proposed to relax the space reduction as it has bad effects on flash memory. A model guided evaluation is finally presented, and the results show that the lifetime can be significantly improved with little space reduction.
| Original language | English |
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| Title of host publication | GLSVLSI '18 |
| Subtitle of host publication | Proceedings of the 2018 Great Lakes Symposium on VLSI |
| Publisher | Association for Computing Machinery |
| Pages | 225-230 |
| ISBN (Print) | 9781450357241 |
| DOIs | |
| Publication status | Published - 30 May 2018 |
| Event | 28th Great Lakes Symposium on VLSI, GLSVLSI 2018 - Chicago, United States Duration: 23 May 2018 → 25 May 2018 http://www.glsvlsi.org/ |
Publication series
| Name | Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI |
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Conference
| Conference | 28th Great Lakes Symposium on VLSI, GLSVLSI 2018 |
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| Place | United States |
| City | Chicago |
| Period | 23/05/18 → 25/05/18 |
| Internet address |