Loop scheduling and bank type assignment for heterogeneous multi-bank memory

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journal

15 Scopus Citations
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Author(s)

  • Meikang Qiu
  • Minyi Guo
  • Meiqin Liu
  • Laurence T. Yang
  • Edwin H.-M. Sha

Related Research Unit(s)

Detail(s)

Original languageEnglish
Pages (from-to)546-558
Journal / PublicationJournal of Parallel and Distributed Computing
Volume69
Issue number6
Publication statusPublished - Jun 2009

Abstract

Many high-performance DSP processors employ multi-bank on-chip memory to improve performance and energy consumption. This architectural feature supports higher memory bandwidth by allowing multiple data memory accesses to be executed in parallel. However, making effective use of multi-bank memory remains difficult, considering the combined effect of performance and energy requirement. This paper studies the scheduling and assignment problem about how to minimize the total energy consumption while satisfying the timing constraint with heterogeneous multi-bank memory for applications with loop. An algorithm, TASL (Type Assignment and Scheduling for Loops), is proposed. The algorithm uses bank type assignment with the consideration of variable partition to find the best configuration for both memory and ALU. The experimental results show that the average improvement on energy-saving is significant by using TASL. © 2009 Elsevier Inc. All rights reserved.

Research Area(s)

  • Heterogeneous, Loop scheduling, Low power design, Multi-bank memory, Type assignment

Citation Format(s)

Loop scheduling and bank type assignment for heterogeneous multi-bank memory. / Qiu, Meikang; Guo, Minyi; Liu, Meiqin; Xue, Chun Jason; Yang, Laurence T.; Sha, Edwin H.-M.

In: Journal of Parallel and Distributed Computing, Vol. 69, No. 6, 06.2009, p. 546-558.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journal