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Abstract
Spoof surface plasmon polariton (SSPP) interconnects have great potential for the next-generation wireless communications and terahertz (THz) integrated circuits. SSPP logic gates are reported to meet the above development requirements. However, the reported SSPP logic gates consist of 3D domino waveguide structure and conversion structure with a funnel-shaped metasurface; and hence, suffer from the size limit of the compact on-chip integrations. To explore a more compact and flexible design, a series of logic gates in the planar THz SSPP platform, including OR, AND, XOR, NOT, and NAND gates, is experimentally demonstrated. Owing to the flexible dispersion behaviors, different phase differences between inputs can be controlled by manipulating the SSPP waveguide structure, such as the SSPP Mach–Zehnder interferometer, thereby realizing various THz SSPP logic gates, which will enable powerful potential in large-scale on-chip systems, future wireless communications, and intelligent computing. © 2022 Wiley-VCH GmbH
| Original language | English |
|---|---|
| Article number | 2201225 |
| Number of pages | 7 |
| Journal | Advanced Materials Technologies |
| Volume | 8 |
| Issue number | 4 |
| Online published | 1 Dec 2022 |
| DOIs | |
| Publication status | Published - 24 Feb 2023 |
Funding
This work was supported in part by the Hong Kong Research Grants Council under Grant T42-103/16-N; the National Key Research and Development Program of China under Grant Nos. 2017YFA0700201, 2017YFA0700202, and 2017YFA0700203; and the Major Project of Natural Science Foundation of Jiangsu Province (BK20212002).
Research Keywords
- logic gate
- on-chip integrated devices
- spoof surface plasmon polaritons
- terahertz
RGC Funding Information
- RGC-funded
Fingerprint
Dive into the research topics of 'Logic Gates of Terahertz Spoof Surface Plasmons'. Together they form a unique fingerprint.Projects
- 1 Finished
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TBRS: A Compact System for Terahertz Imaging and Spectroscopy
CHAN, C. H. (Principal Investigator / Project Coordinator), LO, K. W. K. (Co-Principal Investigator), LUK, K. M. (Co-Principal Investigator), PUN, Y. B. E. (Co-Principal Investigator), Pang, S. (Co-Principal Investigator), SHAW, J. (Co-Principal Investigator), VELLAISAMY, A. L. R. (Co-Principal Investigator), CHAN, S. C. (Co-Investigator), DECROZE, C. (Co-Investigator), HO, J. C. Y. (Co-Investigator), JARRAHI, M. (Co-Investigator), LAM, Y. W. (Co-Investigator), LEE, E.-Y. J. (Co-Investigator), LEE, N. P. Y. (Co-Investigator), LEUNG, K. W. (Co-Investigator), LIU, H. (Co-Investigator), QU, S. (Co-Investigator), RENAUD, C. (Co-Investigator), Tong, K. (Co-Investigator), WANG, C. (Co-Investigator), WONG, H. (Co-Investigator), WONG, C. Y. A. (Co-Investigator), WONG, M. H. A. (Co-Investigator) & Wong, K. K. Y. (Co-Investigator)
1/01/17 → 30/06/23
Project: Research