Leveraging Approximate Data for Robust Flash Storage

Qiao Li, Liang Shi*, Jun Yang, Youtao Zhang, Chun Jason Xue

*Corresponding author for this work

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

11 Citations (Scopus)

Abstract

With the increasing bit density and adoption of 3D NAND, flash memory suffers from increased errors. To address the issue, flash devices adopt error correction codes (ECC) with strong error correction capability, like low-density parity-check (LDPC) code, to correct errors. The drawback of LDPC is that, to correct data with a high raw bit error rate (RBER), read latency will be amplified. This work proposes to address this issue with the assistance of approximate data. First, studies have been conducted and show there are ample amount of approximate data available in flash storage. Second, a novel data organization is proposed to fortify the reliability of regular data by leaving approximate data unprotected. Finally, a new data allocation strategy and modified garbage collection scheme are presented to complete the design. The experimental results show that the proposed approach can improve read performance by 30% on average comparing to current techniques.
Original languageEnglish
Title of host publicationProceedings of the 56th Annual Design Automation Conference 2019
PublisherAssociation for Computing Machinery
ISBN (Electronic)978-1-4503-6725-7
DOIs
Publication statusPublished - 6 Jun 2019
Event56th Design Automation Conference (DAC 2019) - Las Vegas Convention Center., Las Vegas, United States
Duration: 2 Jun 20196 Jun 2019
https://www.dac.com/

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference56th Design Automation Conference (DAC 2019)
PlaceUnited States
CityLas Vegas
Period2/06/196/06/19
Internet address

Bibliographical note

Research Unit(s) information for this publication is provided by the author(s) concerned.

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