Layer-by-layer-assembled reduced graphene oxide/gold nanoparticle hybrid double-floating-gate structure for low-voltage flexible flash memory
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Author(s)
Related Research Unit(s)
Detail(s)
Original language | English |
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Pages (from-to) | 872-877 |
Journal / Publication | Advanced Materials |
Volume | 25 |
Issue number | 6 |
Publication status | Published - 13 Feb 2013 |
Link(s)
Abstract
A hybrid double-floating-gate flexible memory device by utilizing an rGO-sheet monolayer and a Au NP array as upper and lower floating gates is reported. The rGO buffer layer acts as a charge-trapping layer and introduces an energy barrier between the Au NP lower floating gate and the channel. The proposed memory device demonstrates a strong improvement in both field-effect-transistor (FET) and memory characteristics. Copyright © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Research Area(s)
- flexible flash memory, gold nanoparticles, hybrid double floating gates, low voltage, reduced graphene oxide
Citation Format(s)
Layer-by-layer-assembled reduced graphene oxide/gold nanoparticle hybrid double-floating-gate structure for low-voltage flexible flash memory. / Han, Su-Ting; Zhou, Ye; Wang, Chundong et al.
In: Advanced Materials, Vol. 25, No. 6, 13.02.2013, p. 872-877.
In: Advanced Materials, Vol. 25, No. 6, 13.02.2013, p. 872-877.
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review