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High performance low power low voltage adder

A. Wu, C. K. Ng

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

Abstract

A high performance adder has been designed for low power, low voltage applications. The proposed circuit has a better performance in terms of power consumption and area efficiency. To justify claims, simulation results of various high speed adders are compared. The proposed adder is comparably fast compared to the other adders.
Original languageEnglish
Pages (from-to)681-682
JournalElectronics Letters
Volume33
Issue number8
DOIs
Publication statusPublished - 10 Apr 1997

Research Keywords

  • Adders
  • CMOS digital integrated circuits

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