High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures

Yuan Liu; Jiming Sheng; Hao Wu; Qiyuan He; Hung-Chieh Cheng; Muhammad Imran Shakir; Yu Huang; Xiangfeng Duan

doi:10.1002/adma.201506173

High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures

Yuan Liu, Jiming Sheng, Hao Wu, Qiyuan He, Hung-Chieh Cheng, Muhammad Imran Shakir, Yu Huang, Xiangfeng Duan^*

^*Corresponding author for this work

Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

43 Citations (Scopus)

Abstract

Scalable fabrication of vertical‐tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm^-2. This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene–silicon heterostructures.

Original language	English
Pages (from-to)	4120-4125
Journal	Advanced Materials
Volume	28
Issue number	21
Online published	1 Apr 2016
DOIs	https://doi.org/10.1002/adma.201506173
Publication status	Published - 1 Jun 2016
Externally published	Yes

Research Keywords

graphene
graphene-silicon junctions
high current density
tunneling transistors
vertical transistors

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title = "High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures",

abstract = "Scalable fabrication of vertical‐tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm-2. This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene–silicon heterostructures.",

keywords = "graphene, graphene-silicon junctions, high current density, tunneling transistors, vertical transistors",

author = "Yuan Liu and Jiming Sheng and Hao Wu and Qiyuan He and Hung-Chieh Cheng and Shakir, {Muhammad Imran} and Yu Huang and Xiangfeng Duan",

year = "2016",

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day = "1",

doi = "10.1002/adma.201506173",

language = "English",

volume = "28",

pages = "4120--4125",

journal = "Advanced Materials",

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T1 - High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures

AU - Liu, Yuan

AU - Sheng, Jiming

AU - Wu, Hao

AU - He, Qiyuan

AU - Cheng, Hung-Chieh

AU - Shakir, Muhammad Imran

AU - Huang, Yu

AU - Duan, Xiangfeng

PY - 2016/6/1

Y1 - 2016/6/1

N2 - Scalable fabrication of vertical‐tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm-2. This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene–silicon heterostructures.

AB - Scalable fabrication of vertical‐tunneling transistors is presented based on heterostructures formed between graphene, highly doped silicon, and its native oxide. Benefiting from the large density of states of highly doped silicon, the tunneling transistors can deliver a current density over 20 A cm-2. This study demonstrates that the interfacial native oxide plays a crucial role in governing the carrier transport in graphene–silicon heterostructures.

KW - graphene

KW - graphene-silicon junctions

KW - high current density

KW - tunneling transistors

KW - vertical transistors

UR - http://www.scopus.com/inward/record.url?scp=84963591529&partnerID=8YFLogxK

UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-84963591529&origin=recordpage

U2 - 10.1002/adma.201506173

DO - 10.1002/adma.201506173

M3 - RGC 21 - Publication in refereed journal

SN - 0935-9648

VL - 28

SP - 4120

EP - 4125

JO - Advanced Materials

JF - Advanced Materials

IS - 21

ER -

High-Current-Density Vertical-Tunneling Transistors from Graphene/Highly Doped Silicon Heterostructures

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Research Keywords

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