HFNet : A CNN Architecture Co-designed for Neuromorphic Hardware With a Crossbar Array of Synapses
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Author(s)
Detail(s)
Original language | English |
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Article number | 907 |
Journal / Publication | Frontiers in Neuroscience |
Volume | 14 |
Online published | 26 Oct 2020 |
Publication status | Published - Oct 2020 |
Externally published | Yes |
Link(s)
DOI | DOI |
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Attachment(s) | Documents
Publisher's Copyright Statement
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Link to Scopus | https://www.scopus.com/record/display.uri?eid=2-s2.0-85095719941&origin=recordpage |
Permanent Link | https://scholars.cityu.edu.hk/en/publications/publication(3389d826-f530-4b18-9c54-9d3438c665e2).html |
Abstract
The hardware-software co-optimization of neural network architectures is a field of research that emerged with the advent of commercial neuromorphic chips, such as the IBM TrueNorth and Intel Loihi. Development of simulation and automated mapping software tools in tandem with the design of neuromorphic hardware, whilst taking into consideration the hardware constraints, will play an increasingly significant role in deployment of system-level applications. This paper illustrates the importance and benefits of co-design of convolutional neural networks (CNN) that are to be mapped onto neuromorphic hardware with a crossbar array of synapses. Toward this end, we first study which convolution techniques are more hardware friendly and propose different mapping techniques for different convolutions. We show that, for a seven-layered CNN, our proposed mapping technique can reduce the number of cores used by 4.9–13.8 times for crossbar sizes ranging from 128 × 256 to 1,024 × 1,024, and this can be compared to the toeplitz method of mapping. We next develop an iterative co-design process for the systematic design of more hardware-friendly CNNs whilst considering hardware constraints, such as core sizes. A python wrapper, developed for the mapping process, is also useful for validating hardware design and studies on traffic volume and energy consumption. Finally, a new neural network dubbed HFNet is proposed using the above co-design process; it achieves a classification accuracy of 71.3% on the IMAGENET dataset (comparable to the VGG-16) but uses 11 times less cores for neuromorphic hardware with core size of 1,024 × 1,024. We also modified the HFNet to fit onto different core sizes and report on the corresponding classification accuracies. Various aspects of the paper are patent pending.
Research Area(s)
- convolution, convolutional neural network, crossbar array, deep learning, hardware constraints, neural network, neuromorphic chip, neuromorphic computing
Citation Format(s)
HFNet: A CNN Architecture Co-designed for Neuromorphic Hardware With a Crossbar Array of Synapses. / Gopalakrishnan, Roshan; Chua, Yansong; Sun, Pengfei et al.
In: Frontiers in Neuroscience, Vol. 14, 907, 10.2020.
In: Frontiers in Neuroscience, Vol. 14, 907, 10.2020.
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
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