Hardware implementation trade-offs of polynomial approximations and interpolations

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

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Author(s)

Detail(s)

Original languageEnglish
Pages (from-to)686-701
Journal / PublicationIEEE Transactions on Computers
Volume57
Issue number5
Publication statusPublished - 2008
Externally publishedYes

Abstract

This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits. In polynomial approximations, polynomials are evaluated using stored coefficients. Polynomial interpolations, however, require the coefficients to be computed on-the-fly by using stored function values. Although it is known that interpolations require less memory than approximations, but at the expense of additional computations, the trade-offs in memory, area, delay, and power consumption between the two approaches have not been examined in detail. This work quantitatively analyzes these trade-offs for optimized approximations and interpolations across different functions and target precisions. Hardware architectures for degree-1 and degree-2 approximations and interpolations are described. The results show that the extent of memory savings realized by using interpolation is significantly lower than what is commonly believed. Furthermore, experimental results on a field-programmable gate array (FPGA) show that, for high output precision, degree-1 interpolations offer considerable area and power savings over degree-1 approximations, but similar savings are not realized when degree-2 interpolations and approximations are compared. The availability of both interpolation-based and approximation-based designs offers a richer set of design trade-offs than what is available using either interpolation or approximation alone. © 2008 IEEE.

Research Area(s)

  • Algorithms implemented in hardware, Approximation, Interpolation, VLSI systems

Citation Format(s)

Hardware implementation trade-offs of polynomial approximations and interpolations. / Lee, Dong-U.; Cheung, Ray C.C.; Luk, Wayne; Villasenor, John D.

In: IEEE Transactions on Computers, Vol. 57, No. 5, 2008, p. 686-701.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review