TY - GEN
T1 - Giant Electroresistance Switching of Two-dimensional Ferroelectric α-In2Se3on p+-Si
AU - Lee, Ko-Chun
AU - Retamal, José Ramón Durán
AU - Xue, Fei
AU - Cheng, Bin
AU - Tang, Hao-Ling
AU - Chiu, Ming-Hui
AU - Hu, Wei-Jin
AU - Wu, Chih-I
AU - Chen, Mei-Hsin
AU - Li, Lain-Jong
AU - Lien, Chen-Hsin
AU - He, Jr-Hau
PY - 2020
Y1 - 2020
N2 - Recently, the demonstration of the ferroelectricity of phase In2Se3(α-In2Se3) has opened new opportunities to develop two-dimensional small bandgap ferroelectric memories. Conventional ferroelectric hetero-junction memories have been widely studied but the performance is still limited by the large bandgap of oxide-based ferroelectric materials and limits the diode ON current and results in low ON/OFF ratio. Accordingly, we propose a novel resistive switching memory device based on the unique ferroelectric and semiconductor properties of α-In2Se3. By forming the hetero-junction of α-In2Se3 with the highly degenerated p+–Si substrate, we achieve a giant ferroelectric resistive ON/OFF ratio of 2.3 × 106.
AB - Recently, the demonstration of the ferroelectricity of phase In2Se3(α-In2Se3) has opened new opportunities to develop two-dimensional small bandgap ferroelectric memories. Conventional ferroelectric hetero-junction memories have been widely studied but the performance is still limited by the large bandgap of oxide-based ferroelectric materials and limits the diode ON current and results in low ON/OFF ratio. Accordingly, we propose a novel resistive switching memory device based on the unique ferroelectric and semiconductor properties of α-In2Se3. By forming the hetero-junction of α-In2Se3 with the highly degenerated p+–Si substrate, we achieve a giant ferroelectric resistive ON/OFF ratio of 2.3 × 106.
UR - https://www.scopus.com/pages/publications/85093697740
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-85093697740&origin=recordpage
U2 - 10.1109/VLSI-TSA48913.2020.9203707
DO - 10.1109/VLSI-TSA48913.2020.9203707
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 9781728142326
T3 - International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
SP - 88
EP - 89
BT - 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020
PB - IEEE
T2 - 2020 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2020
Y2 - 10 August 2020 through 13 August 2020
ER -