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FPGA architecture of generalized Laguerre-Volterra MIMO model for neural population activities

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

We present a full-parallelized and pipelined architecture for a generalized Laguerre-Volterra MIMO system to identify the time-varying neural dynamics underlying spike activities. The proposed architecture consists of a first stage containing a vector convolution and MAC (Multiply and Accumulation) component; a second stage containing a prethreshold potential updating unit with an error approximation function component; and a third stage consisting of a gradient calculation unit. A flexible and efficient architecture that can accommodate different design speed requirements is generated. The design runs on a Xilinx Virtex-6 FPGA and the processing core produces data samples at a speed of 1.33 × 106 data frames/sec, which is 3.1 × 103 times faster than the corresponding C model running on an Intel i7-860 Quad Core Processor. © 2011 IEEE.
Original languageEnglish
Title of host publicationProceedings - 21st International Conference on Field Programmable Logic and Applications, FPL 2011
Pages44-49
DOIs
Publication statusPublished - 2011
Event21st International Conference on Field Programmable Logic and Applications, FPL 2011 - Chania, Greece
Duration: 5 Sept 20117 Sept 2011

Conference

Conference21st International Conference on Field Programmable Logic and Applications, FPL 2011
PlaceGreece
CityChania
Period5/09/117/09/11

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