Abstract
Charge trapping layers are formed from different metallic nanocrystals in MoS2-based nanocrystal floating gate memory cells in a process compatible with existing fabrication technologies. The memory cells with Au nanocrystals exhibit impressive performance with a large memory window of 10 V, a high program/erase ratio of approximately 105 and a long retention time of 10 years.
| Original language | English |
|---|---|
| Pages (from-to) | 208-213 |
| Journal | Small |
| Volume | 11 |
| Issue number | 2 |
| Online published | 13 Aug 2014 |
| DOIs | |
| Publication status | Published - 14 Jan 2015 |
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Dive into the research topics of 'Floating gate memory-based monolayer MoS2 transistor with metal nanocrystals embedded in the gate dielectrics'. Together they form a unique fingerprint.Projects
- 1 Finished
-
ECS: High-Performance Wrap-Gated III-V Nanowire Parallel Array MOSFETs on Silicon
HO, J. C. Y. (Principal Investigator / Project Coordinator)
1/01/14 → 22/12/17
Project: Research
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