Abstract
In this paper, we derive the discrete-time model for the power-factor-correction (PFC) buck-boost converter in terms of a stroboscopic switching map. Fast-scale instability is analysed through a fold diagram, which exposes the periodicity of the operation as well as the locations of the critical phase angles of the line voltage at which instability begins to occur along a half-line cycle. The asymmetrical locations of the critical phase angles along a half-line cycle is explained in terms of 'under-developed' bifurcation. Border collision bifurcations are observed and analysed in detail. Copyright © 2006 John Wiley & Sons, Ltd.
| Original language | English |
|---|---|
| Pages (from-to) | 251-264 |
| Journal | International Journal of Circuit Theory and Applications |
| Volume | 34 |
| Issue number | 3 |
| Online published | 4 May 2006 |
| DOIs | |
| Publication status | Published - May 2006 |
| Externally published | Yes |
Research Keywords
- buck-boost converter
- power factor correction
- fast-scale instability
- bifurcation
- border collision
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