TY - GEN
T1 - Energy-Efficient Real-Time Task Scheduling in Multiprocessor DVS Systems
AU - Chen, Jian-Jia
AU - Yang, Chuan-Yue
AU - Kuo, Tei-Wei
AU - Shih, Chi-Sheng
PY - 2007/1
Y1 - 2007/1
N2 - Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. The effective use of energy could not only extend operation duration for hand-held devices but also cut down power bills of server systems. Moreover, while many chip makers are releasing multi-core chips and multiprocessor system-on-a-chips (SoCs), multiprocessor platforms for different applications become even more popular. Multiprocessor platforms could improve the system performance and accommodate the growing demand of computing power and the variety of application functionality. This paper summarizes our work on several important issues in energy-efficient scheduling for real-time tasks in multiprocessor DVS systems. Distinct from most previous work based on heuristics, we aim at the provision of approximated solutions with worst-case guarantees. The proposed algorithms are evaluated by a series of experiments to provide insights in system designs.
AB - Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. The effective use of energy could not only extend operation duration for hand-held devices but also cut down power bills of server systems. Moreover, while many chip makers are releasing multi-core chips and multiprocessor system-on-a-chips (SoCs), multiprocessor platforms for different applications become even more popular. Multiprocessor platforms could improve the system performance and accommodate the growing demand of computing power and the variety of application functionality. This paper summarizes our work on several important issues in energy-efficient scheduling for real-time tasks in multiprocessor DVS systems. Distinct from most previous work based on heuristics, we aim at the provision of approximated solutions with worst-case guarantees. The proposed algorithms are evaluated by a series of experiments to provide insights in system designs.
KW - DVS
KW - Energy-efficient scheduling
KW - Multiprocessor systems
KW - Real-time systems
UR - http://www.scopus.com/inward/record.url?scp=46649095435&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-46649095435&origin=recordpage
U2 - 10.1109/ASPDAC.2007.358009
DO - 10.1109/ASPDAC.2007.358009
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 1424406293
SN - 9781424406296
SN - 1424406307
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 342
EP - 349
BT - Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
T2 - 12th Asia and South Pacific Design Automation Conference (ASP-DAC 2007)
Y2 - 23 January 2007 through 26 January 2007
ER -
