Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism

Chin-Hsien Wu; Tei-Wei Kuo; Chia-Lin Yang

doi:10.1145/1016720.1016755

Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism

Chin-Hsien Wu
, Tei-Wei Kuo
, Chia-Lin Yang

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

8 Citations (Scopus)

Abstract

One of the emerging critical issues for flash-memory storage systems, especially on the implementations of many embedded systems, is on its programmed I/O nature for data transfers. Programmed-I/O-based data transfers might not only result in the wasting of valuable CPU cycles of microprocessors but also unnecessarily consume much more energy from batteries. This paper presents an interrupt-emulation mechanism for flash-memory storage systems with an energy-efficient management strategy. We propose to revise the waiting function in the Memory-Technology-Device (MTD) layer to relieve the microprocessor from busy waiting and to reduce the energy consumption of the system. We show that energy consumption could be significantly reduced with good saving on CPU cycles and minor delay on the average response time in the experiments.

Original language	English
Title of host publication	CODES+ISSS 2004 - International Conference on Hardware/Software Codesign and System Synthesis
Pages	134-139
DOIs	https://doi.org/10.1145/1016720.1016755
Publication status	Published - Sept 2004
Externally published	Yes
Event	2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2004) - Stockholm, Sweden Duration: 8 Sept 2004 → 10 Sept 2004

Publication series

Name	IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS

Conference

Conference	2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2004)
Abbreviated title	CODES+ISSS'04
Place	Sweden
City	Stockholm
Period	8/09/04 → 10/09/04

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Research Keywords

Embedded Systems
Energy-Efficient
Flash Memory
Interrupt-Emulation I/O
Programmed I/O
Storage Systems

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10.1145/1016720.1016755

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Wu, C.-H., Kuo, T.-W., & Yang, C.-L. (2004). Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism. In CODES+ISSS 2004 - International Conference on Hardware/Software Codesign and System Synthesis (pp. 134-139). (IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS). https://doi.org/10.1145/1016720.1016755

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title = "Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism",

abstract = "One of the emerging critical issues for flash-memory storage systems, especially on the implementations of many embedded systems, is on its programmed I/O nature for data transfers. Programmed-I/O-based data transfers might not only result in the wasting of valuable CPU cycles of microprocessors but also unnecessarily consume much more energy from batteries. This paper presents an interrupt-emulation mechanism for flash-memory storage systems with an energy-efficient management strategy. We propose to revise the waiting function in the Memory-Technology-Device (MTD) layer to relieve the microprocessor from busy waiting and to reduce the energy consumption of the system. We show that energy consumption could be significantly reduced with good saving on CPU cycles and minor delay on the average response time in the experiments.",

keywords = "Embedded Systems, Energy-Efficient, Flash Memory, Interrupt-Emulation I/O, Programmed I/O, Storage Systems",

author = "Chin-Hsien Wu and Tei-Wei Kuo and Chia-Lin Yang",

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doi = "10.1145/1016720.1016755",

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series = "IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS",

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note = "2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2004), CODES+ISSS'04 ; Conference date: 08-09-2004 Through 10-09-2004",

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Wu, C-H, Kuo, T-W & Yang, C-L 2004, Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism. in CODES+ISSS 2004 - International Conference on Hardware/Software Codesign and System Synthesis. IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS, pp. 134-139, 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2004), Stockholm, Sweden, 8/09/04. https://doi.org/10.1145/1016720.1016755

Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism. / Wu, Chin-Hsien; Kuo, Tei-Wei; Yang, Chia-Lin.
CODES+ISSS 2004 - International Conference on Hardware/Software Codesign and System Synthesis. 2004. p. 134-139 (IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS).

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism

AU - Wu, Chin-Hsien

AU - Kuo, Tei-Wei

AU - Yang, Chia-Lin

PY - 2004/9

Y1 - 2004/9

N2 - One of the emerging critical issues for flash-memory storage systems, especially on the implementations of many embedded systems, is on its programmed I/O nature for data transfers. Programmed-I/O-based data transfers might not only result in the wasting of valuable CPU cycles of microprocessors but also unnecessarily consume much more energy from batteries. This paper presents an interrupt-emulation mechanism for flash-memory storage systems with an energy-efficient management strategy. We propose to revise the waiting function in the Memory-Technology-Device (MTD) layer to relieve the microprocessor from busy waiting and to reduce the energy consumption of the system. We show that energy consumption could be significantly reduced with good saving on CPU cycles and minor delay on the average response time in the experiments.

AB - One of the emerging critical issues for flash-memory storage systems, especially on the implementations of many embedded systems, is on its programmed I/O nature for data transfers. Programmed-I/O-based data transfers might not only result in the wasting of valuable CPU cycles of microprocessors but also unnecessarily consume much more energy from batteries. This paper presents an interrupt-emulation mechanism for flash-memory storage systems with an energy-efficient management strategy. We propose to revise the waiting function in the Memory-Technology-Device (MTD) layer to relieve the microprocessor from busy waiting and to reduce the energy consumption of the system. We show that energy consumption could be significantly reduced with good saving on CPU cycles and minor delay on the average response time in the experiments.

KW - Embedded Systems

KW - Energy-Efficient

KW - Flash Memory

KW - Interrupt-Emulation I/O

KW - Programmed I/O

KW - Storage Systems

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U2 - 10.1145/1016720.1016755

DO - 10.1145/1016720.1016755

M3 - RGC 32 - Refereed conference paper (with host publication)

SN - 1581139373

T3 - IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis, CODES+ISSS

SP - 134

EP - 139

BT - CODES+ISSS 2004 - International Conference on Hardware/Software Codesign and System Synthesis

T2 - 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS 2004)

Y2 - 8 September 2004 through 10 September 2004

ER -

Energy-Efficient Flash-Memory Storage Systems with an Interrupt-Emulation Mechanism

Abstract

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UN SDGs

Research Keywords

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