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Embedded architectural design using protection logics to defend attack of buffer overflow and unauthorized access of code

  • C. H. Yau
  • , Y. Y. Tan
  • , Anthony S. Fong*
  • , P. L. Mok
  • *Corresponding author for this work

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

As security is always a major concern in most of the networked computer systems, embedded systems should provide security features to defend the attack and protect the confidential and sensitive data. Many Trojan Horses and viruses use the security holes of exception to trigger attack, such as buffer overflow attack. Although most embedded systems rely on the programmer, the compiler or the third-party security software to defend and protect the systems against the buffer overflow attack, these techniques could not completely maintain the overall system security. Using a secure programming language is another approach to protect the system, but this approach contains a large security hole that break the overall security. Therefore, this paper proposes a secure Java embedded processor architecture called jHISC with protection logic to protect the system naturally. This new processor realized the natural secure language features of Java in the core architecture to enhance the overall system security. It performs various rigid hardware bound checks and embedded access control checks to avoid the code bypassing. The current implementation phase is under version 4 with 4KB instruction cache and 8KB data cache is described by VHDL and implemented and verified in a Xilinx Virtex FPGA. © 2008 IEEE. DOI 10.1109/CIT.2008.Workshops.119.
Original languageEnglish
Title of host publicationProceedings - 8th IEEE International Conference on Computer and Information Technology Workshops, CIT Workshops 2008
Pages264-269
DOIs
Publication statusPublished - 2008
Event8th IEEE International Conference on Computer and Information Technology Workshops, CIT Workshops 2008 - Sydney, Australia
Duration: 8 Jul 200811 Jul 2008

Conference

Conference8th IEEE International Conference on Computer and Information Technology Workshops, CIT Workshops 2008
PlaceAustralia
CitySydney
Period8/07/0811/07/08

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