Effects of thermal annealing on the interface between tungsten and CeO2/La2O3 stack gate dielectrics

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

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Original languageEnglish
Pages (from-to)7-13
Journal / PublicationVacuum
Volume140
Publication statusPublished - 1 Jun 2017

Abstract

The impacts of thermal annealing on the interfacial reactions and bonding structures between the tungsten metal gate and CeO2/La2O3 stacked dielectrics were investigated by x-ray photoelectron spectroscopy (XPS) measurements. We found that the amount of W oxidation increases with the depth closer to the CeO2 layer. In addition, as the annealing temperature increases to 600 °C, out-diffusion of Ce and La atoms to the bulk W, leading to the formation of Ce-O-W or La-O-W phases at the W/CeO2-La2O3 transition layer, were observed. A quantitative analysis on the oxidation states of tungsten (i. e. Wn+, with n = 0, 2, 4, 5, and 6) were conducted by the Gaussian decomposition method. Results show that in the as-deposited sample the metallic W0 (about 60%) is the majority content state. Other oxidation states such as W2+, W4+, W6+, and W5+ are still noticeable. With 600 °C annealing, the amount of W6+ state dramatically increases to about 16% and it accompanies with the decrease of CeO2 phase. These observations indicate that the high temperature annealing would not only lead to a significant oxidation of tungsten film, but also promote the material intermixing at W/CeO2 interface. The mechanisms of interfacial reactions and their effect on EOT were discussed.

Research Area(s)

  • CMOS technology, High-k dielectrics, Interface reaction, Thermal annealing, X-ray photoelectron spectroscopy (XPS)