Effective Stack Wear Leveling for NVM

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

2 Scopus Citations
View graph of relations

Author(s)

  • Jifeng Wu
  • Wei Li
  • Libing Wu
  • Mengting Yuan
  • Jingling Xue
  • Qingan Li

Related Research Unit(s)

Detail(s)

Original languageEnglish
Pages (from-to)3250-3263
Number of pages14
Journal / PublicationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume42
Issue number10
Online published30 Jan 2023
Publication statusPublished - Oct 2023

Abstract

With the rapid growth of data processed by computer systems, Non-Volatile Memory (NVM), represented by Phase Change Memory (PCM), is regarded as a promising nextgeneration storage technology as it offers superior advantages over DRAM. However, PCM suffers from a severe write durability problem, leading to an extremely short lifespan under the uneven write patterns of real-world programs. We observe that loops are one of the primary causes of uneven writes on the stack. To alleviate this problem, we present Loop2Recursion, a compiler-assisted stack wear leveling technique that automatically transforms loops into recursive functions. In addition, we propose several optimizations to reduce the stack sizes and instruction counts of the generated recursive functions, two schemes to limit recursion depth, and selective loop transformation for cache-enabled architectures. Experimental results demonstrate that Loop2Recursion outperforms state-of-the-art methods by significantly improving stack wear leveling with a greatly reduced performance overhead. © 2023 IEEE.

Research Area(s)

  • Compiler, Hardware, Loop, Memory architecture, Memory management, Non-Volatile Memory, Nonvolatile memory, Optimization, Phase change materials, Random access memory, Recursion, Wear Leveling, nonvolatile memory (NVM)

Citation Format(s)

Effective Stack Wear Leveling for NVM. / Wu, Jifeng; Li, Wei; Wu, Libing et al.
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 42, No. 10, 10.2023, p. 3250-3263.

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review