Dynamic Virtual Page-based Flash Translation Layer with Novel Hot Data Identification and Adaptive Parallelism Management

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

8 Scopus Citations
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Original languageEnglish
Pages (from-to)56200-56213
Journal / PublicationIEEE Access
Online published28 Sep 2018
Publication statusPublished - 2018


Solid state disk(SSD) tends to replace traditional motor-driven hard disk in high-end storage devices in past few decades. However, various inherent features such as out-of-place update (resorting to garbage collection (GC)) and limited endurance (resorting to wear leveling) need to be reduced to a large extent before that day comes. Both the garbage collection and wear leveling fundamentally depend on hot data identification (HDI). In this paper, we propose a hot data-aware flash translation layer architecture based on a dynamic virtual page (DVPFTL) so as to improve the performance and lifetime of NAND flash devices. First, we develop a generalized dual layer HDI (DL-HDI) framework, which is composed of a cold data preclassifier and a hot data post-identifier. Those can efficiently follow the frequency and recency of information access. Then, we design an adaptive parallelism manager (APM) to assign the clustered data chunks to distinct resident blocks in the SSD so as to prolong its endurance. Finally, the experimental results from our realized SSD prototype indicate that the DVPFTL scheme has reliably improved the parallelizability and endurance of NAND flash devices with improved GC-costs, compared with related works.

Research Area(s)

  • Data transfer, flash translation layer (FTL), garbage collection, hot data identification, Micromechanical devices, NAND flash, Parallel processing, Performance evaluation, Prototypes, Registers, Reliability, Solid-state drive (SSD)