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DYNAMIC RECONFIGURATION FOR FAULT-TOLERANT SYSTOLIC ARRAYS.

  • H. F. Li
  • , D. Pao
  • , R. Jayakumar

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

A distributed reconfiguration algorithm to restructure 2-D systolic array with faulty cells is described. The reconfiguration is based only on local information and can be done automatically. Transient faults can be covered. It is shown that a 2n multiplied by 2n array is exactly 3n-fault-tolerant when reconfigured into an n multiplied by n array. O(n**3) redundancy in the number of processing cells is sufficient to ensure successful reconfiguration into an n multiplied by n array. A systolic collector is developed to output the data at fixed ports and times.
Original languageEnglish
Title of host publicationProceedings of the International Conference on Parallel Processing
PublisherPennsylvania State Univ Press
Pages110-113
ISBN (Print)271006080
Publication statusPublished - 1987
Externally publishedYes
EventProc Int Conf Parallel Process 1987 - Universal Park, PA, USA
Duration: 17 Aug 198721 Aug 1987

Publication series

Name
ISSN (Electronic)0190-3918

Conference

ConferenceProc Int Conf Parallel Process 1987
CityUniversal Park, PA, USA
Period17/08/8721/08/87

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