Digital controlled analog architecture for DCT and DST using capacitor switching

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

9 Scopus Citations
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Author(s)

Detail(s)

Original languageEnglish
Journal / PublicationProceedings - IEEE International Symposium on Circuits and Systems
Volume2
Publication statusPublished - 2004
Externally publishedYes

Conference

Title2004 IEEE International Symposium on Cirquits and Systems - Proceedings
PlaceCanada
CityVancouver, BC
Period23 - 26 May 2004

Abstract

This paper describes a sampled analog architecture, for computing DCT or DST, using switched capacitor principle with capacitance switching. The input sample stream is applied to an array of capacitors and multiplied by all the DCT/DST coefficients concurrently using capacitor ratios. These capacitors are switched properly with the help of a switching matrix, to realize switched capacitor integrators for performing necessary addition/ subtraction. . Proposed architecture simple, regular with lower gate count may be used for online computations.

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