Digital controlled analog architecture for DCT and DST using capacitor switching
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Author(s)
Detail(s)
Original language | English |
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Journal / Publication | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 2 |
Publication status | Published - 2004 |
Externally published | Yes |
Conference
Title | 2004 IEEE International Symposium on Cirquits and Systems - Proceedings |
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Place | Canada |
City | Vancouver, BC |
Period | 23 - 26 May 2004 |
Link(s)
Abstract
This paper describes a sampled analog architecture, for computing DCT or DST, using switched capacitor principle with capacitance switching. The input sample stream is applied to an array of capacitors and multiplied by all the DCT/DST coefficients concurrently using capacitor ratios. These capacitors are switched properly with the help of a switching matrix, to realize switched capacitor integrators for performing necessary addition/ subtraction. . Proposed architecture simple, regular with lower gate count may be used for online computations.
Bibliographic Note
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Citation Format(s)
Digital controlled analog architecture for DCT and DST using capacitor switching. / Basu, Arindam; Mal, Ashis Kumar; Dhar, Anindya Sundar.
In: Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 2, 2004.
In: Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 2, 2004.
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review