TY - GEN
T1 - Development of an FPGA-based motion control ASIC for robotic manipulators
AU - Xiaoyin, Shao
AU - Dong, Sun
PY - 2006
Y1 - 2006
N2 - In this paper, a fully digital motion controller is designed by using a new developed FPGA based ASIC. The FPGA based ASIC has functions of closed current loop control, closed position/velocity loop control, incremental encoder logic, PWM modulation, fault/brake logic, velocity estimator, host communication module, UART module and Delta-Sigma analog to digital converter. The hardware system executes quickly in dedicated parallel hardware without timing overhead penalty of a serial processor. The update rates of the current control loop and position/velocity control loop are 120 kHz and 20 kHz, respectively. The new designed ASIC can be incorporated with a generalpurpose microcontroller or DSP to provide a simple, compact, lowcost, and effective solution for high-performance motion control. An adaptive control algorithm is implemented in the new designed system in order to control a SCARA robotic manipulator. In order to increase the sampling frequency of the system when using model based control algorithm, the control algorithm is partitioned into a linear portion and a nonlinear portion. The linear portion with position/velocity feedback represents the major control loop and is implemented in the FPGA based ASIC. The nonlinear portion acts as dynamic compensation to the linear portion to perform complex modeling related calculations, and is implemented in the DSP. Experimental results demonstrate that the new proposed system is successful and it exhibits much improved motion performance especially during high-speed motions. © 2006 IEEE.
AB - In this paper, a fully digital motion controller is designed by using a new developed FPGA based ASIC. The FPGA based ASIC has functions of closed current loop control, closed position/velocity loop control, incremental encoder logic, PWM modulation, fault/brake logic, velocity estimator, host communication module, UART module and Delta-Sigma analog to digital converter. The hardware system executes quickly in dedicated parallel hardware without timing overhead penalty of a serial processor. The update rates of the current control loop and position/velocity control loop are 120 kHz and 20 kHz, respectively. The new designed ASIC can be incorporated with a generalpurpose microcontroller or DSP to provide a simple, compact, lowcost, and effective solution for high-performance motion control. An adaptive control algorithm is implemented in the new designed system in order to control a SCARA robotic manipulator. In order to increase the sampling frequency of the system when using model based control algorithm, the control algorithm is partitioned into a linear portion and a nonlinear portion. The linear portion with position/velocity feedback represents the major control loop and is implemented in the FPGA based ASIC. The nonlinear portion acts as dynamic compensation to the linear portion to perform complex modeling related calculations, and is implemented in the DSP. Experimental results demonstrate that the new proposed system is successful and it exhibits much improved motion performance especially during high-speed motions. © 2006 IEEE.
KW - ASIC
KW - FPGA
KW - Motion control
KW - Robotic manipulator
UR - http://www.scopus.com/inward/record.url?scp=34047218100&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-34047218100&origin=recordpage
U2 - 10.1109/WCICA.2006.1713577
DO - 10.1109/WCICA.2006.1713577
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 1424403324
SN - 9781424403325
VL - 2
SP - 8221
EP - 8225
BT - Proceedings of the World Congress on Intelligent Control and Automation (WCICA)
T2 - 6th World Congress on Intelligent Control and Automation, WCICA 2006
Y2 - 21 June 2006 through 23 June 2006
ER -