Development of a High Level Power Estimation Framework for Multicore Processors

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)

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Author(s)

Detail(s)

Original languageEnglish
Title of host publication2018 2nd IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC 2018)
EditorsBing Xu
PublisherIEEE
Pages1767-1770
Number of pages4
ISBN (Electronic)9781538618035
ISBN (Print)9781538618042
Publication statusPublished - May 2018
Externally publishedYes

Publication series

NameIEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference, IMCEC

Conference

Title2nd IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC 2018)
PlaceChina
CityXi'an
Period25 - 27 May 2018

Abstract

This paper presents a tool to estimate power consumption of multicore processors from the instruction level as well as the architectural level, specifically the dynamic power. In embedded systems, power optimization/estimation is a must because most of them are battery operated having limited life. For different application, a system or a processor consumes different amount of power. Knowing the statistics of power at the earlier stage can make the development process more efficient. For this purpose, we have used the Instruction Accurate Simulator Imperas, which gives an interface to define virtual platforms, also known as Open Virtual Platforms to run applications on it. Instruction tracing or profiling is done to get all the instructions that are run by each processor at the architectural level and then power of each instruction is inserted to result the total power consumed by the core. Models of the OR1K and MIPS32 are used for simulating the virtual platforms which are available in the form of dynamic libraries. The instruction profiling is done at the assembly level, while the platform and applications are in the form of C language. Energy consumed by each core is also calculated by assuming the CPI (Cycles per instruction) equal to 1.

Research Area(s)

  • MIPS32, Open Virtual Platforms, Power Estimation

Citation Format(s)

Development of a High Level Power Estimation Framework for Multicore Processors. / Irfan, Muhammad; Masud, Shahid; Pasha, Muhammad Adeel.

2018 2nd IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC 2018). ed. / Bing Xu. IEEE, 2018. p. 1767-1770 8469473 (IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference, IMCEC).

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)