Design of low-phase-noise CMOS transformer-based gate-coupled quadrature VCO
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
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Related Research Unit(s)
Detail(s)
Original language | English |
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Pages (from-to) | 434-436 |
Journal / Publication | Electronics Letters |
Volume | 50 |
Issue number | 6 |
Publication status | Published - 13 Mar 2014 |
Link(s)
Abstract
A low-phase-noise transformer-based gate-coupled quadrature voltagecontrolled oscillator (TGC-QVCO) using 0.13 μm CMOS technology is presented. The TGC-QVCO consumes 7 mW at 1 V power supply with 18% frequency tuning. The measured phase noise at 1 MHz offset varies from about -122 to -119 dBc/Hz for frequency tuning from 1.34 to 1.6 GHz. The achieved figure of merit (FoM) is 179 dB and the chip area is 800 × 900 μm2. © The Institution of Engineering and Technology 2014.
Citation Format(s)
Design of low-phase-noise CMOS transformer-based gate-coupled quadrature VCO. / Shen, Yi; Tsang, K. F.; Lee, Wah Ching et al.
In: Electronics Letters, Vol. 50, No. 6, 13.03.2014, p. 434-436.
In: Electronics Letters, Vol. 50, No. 6, 13.03.2014, p. 434-436.
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review