Abstract
Due to the extraordinary large surface-to-volume ratio, surface effects on semiconductor nanowires have been extensively investigated in recent years for various technological applications. Here, we present a facile interface trapping approach to alter electronic transport properties of GaAs nanowires as a function of diameter utilizing the acceptor-like defect states located between the intrinsic nanowire and its amorphous native oxide shell. Using a nanowire field-effect transistor (FET) device structure, p- to n-channel switching behaviors have been achieved with increasing NW diameters. Interestingly, this oxide interface is shown to induce a space-charge layer penetrating deep into the thin nanowire to deplete all electrons, leading to inversion and thus p-type conduction as compared to the thick and intrinsically n-type GaAs NWs. More generally, all of these might also be applicable to other nanowire material systems with similar interface trapping effects; therefore, careful device design considerations are required for achieving the optimal nanowire device performances. © 2012 American Chemical Society.
| Original language | English |
|---|---|
| Pages (from-to) | 4428-4433 |
| Journal | ACS Nano |
| Volume | 6 |
| Issue number | 5 |
| DOIs | |
| Publication status | Published - 22 May 2012 |
Research Keywords
- Diameter-dependent
- Gallium arsenide (GaAs) nanowires
- Interface trapping effect
- P-n conduction switching
- Tunable electronic transport
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