TY - GEN
T1 - Construction of Short-Length LDPC Codes with Low Error Floor
AU - Zheng, X.
AU - Lau, F. C. M.
AU - Tse, C. K.
AU - He, Y.
PY - 2008/11
Y1 - 2008/11
N2 - It has been known that stopping sets and trapping sets are the main contributors to error floors exhibited by short-length low-density parity-check (LDPC) codes. In this work, a new metric called "approximate cycle set extrinsic message degree (ACSE)" is defined to help removing stopping sets with small size and bad trapping sets. Based on the new metric, we propose a code-construction algorithm that produces LDPC codes with very low error floors. Finally, we compare the error rates between codes produced by the proposed algorithm and MacKay code. © 2008 IEEE.
AB - It has been known that stopping sets and trapping sets are the main contributors to error floors exhibited by short-length low-density parity-check (LDPC) codes. In this work, a new metric called "approximate cycle set extrinsic message degree (ACSE)" is defined to help removing stopping sets with small size and bad trapping sets. Based on the new metric, we propose a code-construction algorithm that produces LDPC codes with very low error floors. Finally, we compare the error rates between codes produced by the proposed algorithm and MacKay code. © 2008 IEEE.
UR - https://www.scopus.com/pages/publications/62949161327
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-62949161327&origin=recordpage
U2 - 10.1109/APCCAS.2008.4746396
DO - 10.1109/APCCAS.2008.4746396
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 9781424423422
SN - 9781424423415
T3 - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
SP - 1818
EP - 1821
BT - Proceedings of APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
T2 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008)
Y2 - 30 November 2008 through 3 December 2008
ER -