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Configurable NAND Flash Translation Layer

  • Yi-Lin Tsai
  • , Jen-Wei Hsieh
  • , Tei-Wei Kuo

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

Flash memory is widely adopted in various consumer products, especially for embedded systems. With strong demands on product designs for overhead control and performance requirements, vendors must have an effective design for the mapping of logical block addresses (LBA's) and physical addresses of data over flash memory. This paper targets such an essential issue by proposing a configurable mapping method that could trade the main-memory overhead with the system performance under the best needs of vendors. A series of experiments is conducted to provide insights on different configurations of the proposed method.
Original languageEnglish
Title of host publicationProceedings - IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing
Number of pages8
Volume2
DOIs
Publication statusPublished - Jun 2006
Externally publishedYes
EventIEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC-2006) - Taichung, Taiwan, China
Duration: 5 Jun 20067 Jun 2006

Publication series

NameProceedings - IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing
Volume2006 II

Conference

ConferenceIEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC-2006)
Abbreviated titleSUTC’06
PlaceTaiwan, China
CityTaichung
Period5/06/067/06/06

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