Computationally efficient modeling of wafer temperatures in a low-pressure chemical vapor deposition furnace

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

7 Scopus Citations
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Author(s)

Detail(s)

Original languageEnglish
Pages (from-to)342-350
Journal / PublicationIEEE Transactions on Semiconductor Manufacturing
Volume16
Issue number2
Online published13 May 2003
Publication statusPublished - May 2003
Externally publishedYes

Abstract

A new thermal model is developed to predict wafer temperatures within a hot-wall low pressure chemical vapor deposition furnace based on the furnace wall temperatures as measured by thermocouples. Based on an energy balance of the furnace system, this model is a transformed linear model which captures the nonlinear relationship between the furnace wall temperature distribution and the wafer temperature distribution. The model can be solved with a direct algorithm instead of iterative algorithms which are used in all existing thermal models. Since the direct algorithm is noniterative, there is no convergence problem, nor local minima problem, related to nonlinear optimization. In addition, the direct algorithm greatly reduces the computation effort. Configuration factors are calculated by a finite area to finite area method. This avoids numerical integration methods which are much more difficult to implement and require more computation. The simplicity of the model form and the fast algorithm make the model useful for real-time updating and control. Model predictions show excellent agreement with experimental data.

Research Area(s)

  • Control-relevant modeling, Hot-wall low pressure CVD, Thermal modeling, Wafer temperature distribution