CMOS low power split-drain MAGFET based magnetic field strength sensor

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

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Detail(s)

Original languageEnglish
Article number104759
Journal / PublicationMicroelectronics Journal
Volume100
Online published3 Apr 2020
Publication statusPublished - Jun 2020

Abstract

A low-power sectorial split-drain MAGFET (SSD-MAGFET) based magnetic field strength sensor consists of a simple counter-based time-to-digital converter was proposed, which converts the magnetic field strength into a digital value by observing the relative drain voltage difference in the SSD-MAGFET, thus eliminating the adverse effect of device and circuit noises without the need of sophisticated operational amplifier nor precise voltage reference. Complete digital readout of the magnetic field strength, field polarity and conversion time information facilitates the seamless integration of the proposed circuit to read-time application. The proposed circuit is fully compatible with standard CMOS process and the presented design example was implemented on 2.5 μm metal gate CMOS process which achieves conversion accuracy is of 1.226 mT/bit for the field range of a maximum dynamic range of ±313.96 mT, and the minimum conversion rate is 17.6 Hz where the whole chip consumes an average of 67.5 mW at supply voltage of 5 V, which is suitable for seamless integration with all sorts of MCU applications.

Research Area(s)

  • MAGFET, Magnetic sensor, Time-to-digital conversion