TY - GEN
T1 - Branch Prediction Directed Dynamic Instruction Cache Locking for Embedded Systems
AU - Qiu, Keni
AU - Zhao, Mengying
AU - Xue, Chun Jason
AU - Orailoglu, Alex
PY - 2013/8
Y1 - 2013/8
N2 - Cache locking is a cache management technique to preclude the replacement of locked cache contents. Cache locking is often used to improve cache access predictability in Worst-Case Execution Time (WCET) analysis. Static cache locking methods have been proposed recently to improve average system performance. This paper presents an approach, Branch Prediction directed Dynamic Cache Locking (BPDCL), to improve average system performance through effective cache conflict miss reduction in different execution regions. In this proposed approach, the control flow graph of a program is partitioned into regions and memory blocks worth locking for each region are calculated during compilation time. At runtime, directed by branch predictions, locking routines are prefetched into a high-speed buffer. The pre-determined cache locking contents are loaded and locked at specific execution points during program execution. Experimental results show that the proposed BPDCL method exhibits an average improvement of 21.8% and 10.3% on cache miss rate reduction in comparison to the case with no cache locking and the static locking method respectively. © 2013 IEEE
AB - Cache locking is a cache management technique to preclude the replacement of locked cache contents. Cache locking is often used to improve cache access predictability in Worst-Case Execution Time (WCET) analysis. Static cache locking methods have been proposed recently to improve average system performance. This paper presents an approach, Branch Prediction directed Dynamic Cache Locking (BPDCL), to improve average system performance through effective cache conflict miss reduction in different execution regions. In this proposed approach, the control flow graph of a program is partitioned into regions and memory blocks worth locking for each region are calculated during compilation time. At runtime, directed by branch predictions, locking routines are prefetched into a high-speed buffer. The pre-determined cache locking contents are loaded and locked at specific execution points during program execution. Experimental results show that the proposed BPDCL method exhibits an average improvement of 21.8% and 10.3% on cache miss rate reduction in comparison to the case with no cache locking and the static locking method respectively. © 2013 IEEE
UR - https://www.scopus.com/pages/publications/84899439970
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-84899439970&origin=recordpage
U2 - 10.1109/RTCSA.2013.6732221
DO - 10.1109/RTCSA.2013.6732221
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 9781479908509
SP - 209
EP - 216
BT - 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications
PB - IEEE
T2 - 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2013)
Y2 - 19 August 2013 through 21 August 2013
ER -