Boosting the Performance with a Data-backup-free Programming Scheme for TLC-based SSDs

Triple-level-ceil(MLC_x3) flash-memory chips are prevalent in current storage markets; however, the growing bit-error-rate and worsen reliability of TLC flash ceils impose challenges on the design of flash storage devices. This problem further exaggerates in the design of a reliable storage system which should be able top support the sudden-power-off-recovery functionalities. To guarantee the data integrity, the backup operation is necessary for supporting the sudden-power-off-recovery function, and it is typically adopted to avoid data corruption before programming TLC flash pages. Usually, the backup process results in a significant overhead and the degradation of programming performance. In contrast to the past work which relies on backup-based or RAID-like approaches to resolve the data integrity issue under any sudden power-off, a data-backup-free programming scheme is proposed to totally remove the needs of costly backup procedures as well as guarantee the data reliability. Our goal is to boost the system performance of TLC-based SSDs without harming the flash reliability. The capability of the proposed design is evaluated by a series of experiments, for which we have very encouraging results. Experimental results show that the proposed design can improve performance and reduce the number of block erasures by up to 78% and 76% respectively when compared to an existing backup-based approach.