TY - GEN
T1 - Bit-shuffled trie
T2 - 2011 IEEE International Conference on Communications, ICC 2011
AU - Pao, Derek
AU - Lu, Ziyan
AU - Poon, Yat Hang
PY - 2011
Y1 - 2011
N2 - Simplicity is the major advantage of implementing hardware IP lookup engine using multi-level index tables. However, the memory efficiency of the conventional multi-level indexing approach is relatively low. In this paper we shall show that by restructuring the binary-trie using a method called bit-shuffling, highly efficient index tables to support the IP lookup operation can be built. The proposed method is evaluated using a real-life IPv4 routing table with 321K prefixes. The required lookup tables occupy 0.8MB on-chip memory. The memory cost is about 21 bits per prefix. © 2011 IEEE.
AB - Simplicity is the major advantage of implementing hardware IP lookup engine using multi-level index tables. However, the memory efficiency of the conventional multi-level indexing approach is relatively low. In this paper we shall show that by restructuring the binary-trie using a method called bit-shuffling, highly efficient index tables to support the IP lookup operation can be built. The proposed method is evaluated using a real-life IPv4 routing table with 321K prefixes. The required lookup tables occupy 0.8MB on-chip memory. The memory cost is about 21 bits per prefix. © 2011 IEEE.
KW - IP lookup
KW - packet forwarding
KW - pipelined architecture
UR - http://www.scopus.com/inward/record.url?scp=80052173138&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-80052173138&origin=recordpage
U2 - 10.1109/icc.2011.5962429
DO - 10.1109/icc.2011.5962429
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 9781612842332
BT - IEEE International Conference on Communications
Y2 - 5 June 2011 through 9 June 2011
ER -