Automating custom-precision function evaluation for embedded processors

Ray C. C. Cheung; Dong-U. Lee; Oskar Mencer; Wayne Luk; Peter Y. K. Cheung

doi:10.1145/1086297.1086302

Automating custom-precision function evaluation for embedded processors

Ray C. C. Cheung
, Dong-U. Lee
, Oskar Mencer
, Wayne Luk
, Peter Y. K. Cheung

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

4 Citations (Scopus)

Abstract

Due to resource and power constraints, embedded processors often cannot afford dedicated floating-point units. For instance, the IBM PowerPC processor embedded in Xilinx Virtex-II Pro FPGAs only supports emulated floating-point arithmetic, which leads to slow operation when floating-point arithmetic is desired. This paper presents a customizable mathematical library using fixed-point arithmetic for elementary function evaluation. We approximate functions via polynomial or rational approximations depending on the user-defined accuracy requirements. The data representation for the inputs and outputs are compatible with IEEE single-precision and double-precision floating-point formats. Results show that our 32-bit polynomial method achieves over 80 times speedup over the single-precision mathematical library from Xilinx, while our 64-bit polynomial method achieves over 30 times speedup. Copyright 2005 ACM.

Original language	English
Title of host publication	CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Publisher	Association for Computing Machinery
Pages	22-31
ISBN (Print)	159593149, 9781595931498
DOIs	https://doi.org/10.1145/1086297.1086302
Publication status	Published - Sept 2005
Externally published	Yes
Event	2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '05) - San Francisco, CA, United States Duration: 24 Sept 2005 → 27 Sept 2005

Conference

Conference	2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '05)
Place	United States
City	San Francisco, CA
Period	24/09/05 → 27/09/05

Research Keywords

Embedded systems
Fixed-point arithmetic
Function evaluation
Reconfigurable computing

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@inproceedings{ceec2feacddf425fa37c81ec429a1e3f,

title = "Automating custom-precision function evaluation for embedded processors",

abstract = "Due to resource and power constraints, embedded processors often cannot afford dedicated floating-point units. For instance, the IBM PowerPC processor embedded in Xilinx Virtex-II Pro FPGAs only supports emulated floating-point arithmetic, which leads to slow operation when floating-point arithmetic is desired. This paper presents a customizable mathematical library using fixed-point arithmetic for elementary function evaluation. We approximate functions via polynomial or rational approximations depending on the user-defined accuracy requirements. The data representation for the inputs and outputs are compatible with IEEE single-precision and double-precision floating-point formats. Results show that our 32-bit polynomial method achieves over 80 times speedup over the single-precision mathematical library from Xilinx, while our 64-bit polynomial method achieves over 30 times speedup. Copyright 2005 ACM.",

keywords = "Embedded systems, Fixed-point arithmetic, Function evaluation, Reconfigurable computing",

author = "Cheung, \{Ray C. C.\} and Dong-U. Lee and Oskar Mencer and Wayne Luk and Cheung, \{Peter Y. K.\}",

year = "2005",

month = sep,

doi = "10.1145/1086297.1086302",

language = "English",

isbn = "159593149",

pages = "22--31",

booktitle = "CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems",

publisher = "Association for Computing Machinery",

address = "United States",

note = "2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '05) ; Conference date: 24-09-2005 Through 27-09-2005",

}

Cheung, RCC, Lee, D-U, Mencer, O, Luk, W & Cheung, PYK 2005, Automating custom-precision function evaluation for embedded processors. in CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems. Association for Computing Machinery, pp. 22-31, 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '05), San Francisco, CA, United States, 24/09/05. https://doi.org/10.1145/1086297.1086302

Automating custom-precision function evaluation for embedded processors. / Cheung, Ray C. C.; Lee, Dong-U.; Mencer, Oskar et al.
CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems. Association for Computing Machinery, 2005. p. 22-31.

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - Automating custom-precision function evaluation for embedded processors

AU - Cheung, Ray C. C.

AU - Lee, Dong-U.

AU - Mencer, Oskar

AU - Luk, Wayne

AU - Cheung, Peter Y. K.

PY - 2005/9

Y1 - 2005/9

N2 - Due to resource and power constraints, embedded processors often cannot afford dedicated floating-point units. For instance, the IBM PowerPC processor embedded in Xilinx Virtex-II Pro FPGAs only supports emulated floating-point arithmetic, which leads to slow operation when floating-point arithmetic is desired. This paper presents a customizable mathematical library using fixed-point arithmetic for elementary function evaluation. We approximate functions via polynomial or rational approximations depending on the user-defined accuracy requirements. The data representation for the inputs and outputs are compatible with IEEE single-precision and double-precision floating-point formats. Results show that our 32-bit polynomial method achieves over 80 times speedup over the single-precision mathematical library from Xilinx, while our 64-bit polynomial method achieves over 30 times speedup. Copyright 2005 ACM.

AB - Due to resource and power constraints, embedded processors often cannot afford dedicated floating-point units. For instance, the IBM PowerPC processor embedded in Xilinx Virtex-II Pro FPGAs only supports emulated floating-point arithmetic, which leads to slow operation when floating-point arithmetic is desired. This paper presents a customizable mathematical library using fixed-point arithmetic for elementary function evaluation. We approximate functions via polynomial or rational approximations depending on the user-defined accuracy requirements. The data representation for the inputs and outputs are compatible with IEEE single-precision and double-precision floating-point formats. Results show that our 32-bit polynomial method achieves over 80 times speedup over the single-precision mathematical library from Xilinx, while our 64-bit polynomial method achieves over 30 times speedup. Copyright 2005 ACM.

KW - Embedded systems

KW - Fixed-point arithmetic

KW - Function evaluation

KW - Reconfigurable computing

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U2 - 10.1145/1086297.1086302

DO - 10.1145/1086297.1086302

M3 - RGC 32 - Refereed conference paper (with host publication)

SN - 159593149

SN - 9781595931498

SP - 22

EP - 31

BT - CASES '05: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems

PB - Association for Computing Machinery

T2 - 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '05)

Y2 - 24 September 2005 through 27 September 2005

ER -

Automating custom-precision function evaluation for embedded processors

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