Automatic accuracy-guaranteed bit-width optimization for fixed and floating-point systems

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review

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Author(s)

Detail(s)

Original languageEnglish
Title of host publicationProceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL
Pages617-620
Publication statusPublished - 2007
Externally publishedYes

Conference

Title2007 International Conference on Field Programmable Logic and Applications, FPL
PlaceNetherlands
CityAmsterdam
Period27 - 29 August 2007

Abstract

In this paper we present Minibit†, an approach that optimizes the bit-widths of fixed-point and floating-point designs, while guaranteeing accuracy. Our approach adopts different levels of analysis giving the designer the opportunity to terminate it at any stage to obtain a result. Range analysis is achieved using a combined affine and interval arithmetic approach to reduce the number of bits. Precision analysis involves a coarse-grain and fine-grain analysis. The best representation, in fixed-point or floating-point, for the numbers is then chosen based on the range, precision and latency. Three case studies are used: discrete cosine transform, B-Splines and RGB to YCbCr color conversion. Our analysis can run over 200 times faster than current approaches to this problem while producing more accurate results, on average within 2-3% of an exhaustive search. © 2007 IEEE.

Citation Format(s)

Automatic accuracy-guaranteed bit-width optimization for fixed and floating-point systems. / Osborne, W. G.; Cheung, R. C C; Coutinho, J. G F; Luk, W.; Mencer, O.

Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL. 2007. p. 617-620 4380730.

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review