Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware
Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review
Author(s)
Related Research Unit(s)
Detail(s)
Original language | English |
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Article number | 7862221 |
Pages (from-to) | 1313-1325 |
Journal / Publication | IEEE Transactions on Computers |
Volume | 66 |
Issue number | 8 |
Publication status | Published - Aug 2017 |
Link(s)
Abstract
In this paper, we present a fast implementation for QC-MDPC Niederreiter encryption. Existing high-speed implementations are considerably resource involving but the solution we propose here mitigates such situation while maintaining the high throughputs. In particular, new arithmetic for lightweight Hamming weight computation and a fast sorting network for MDPC decoding are proposed. A novel constant weight coding unit is proposed to enable standard asymmetric encryptions. For now, the design presented in this work is the fastest one of existing QC-MDPC code based encryptions in the public domain. The area-time product of this work drops by at least 53% compared to previous fast speed designs of QC-MDPC based encryptions. It is shown for instance that our implementation of encrypting engine can sign one encryption in 3.86 µs on a Xilinx Virtex-6 FPGA with 3371 slices. Our iterative decrypting engine can decrypt one ciphertext in 114.64 µs with 5271 slices and our faster non-iterative decrypting engine can decrypt in 65.76 µs with 8781 slices.
Research Area(s)
- Code-based cryptography, FPGA implementation, niederreiter encryption scheme, QC-MDPC code
Citation Format(s)
Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware. / Hu, Jingwei; Cheung, Ray C.C.
In: IEEE Transactions on Computers, Vol. 66, No. 8, 7862221, 08.2017, p. 1313-1325.Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review