TY - GEN
T1 - An instruction folding solution to a Java processor
AU - Yiyu, Tan
AU - Fong, Anthony S.
AU - Xiaojian, Yang
PY - 2007
Y1 - 2007
N2 - Java is widely applied into embedded devices. Java programs are compiled into Java bytecodes, which are executed into the Java virtual machine. The Java virtual machine is a stack machine and instruction folding is a technique to reduce the redundant stack operations. In this paper, a simple instruction folding algorithm is proposed for a Java processor named jHISC, where bytecodes are classified into five categories and the operation results of incomplete folding groups are hold for further folding. In the benchmark JVM98, with respect to all stack operations, the percentage of the eliminated P and C type instructions varies from 87% to 98% and the average is about 93%. The reduced instructions are between 37% and 50% of all operations and the average is 44%. © IFIP International Federation for Information Processing 2007.
AB - Java is widely applied into embedded devices. Java programs are compiled into Java bytecodes, which are executed into the Java virtual machine. The Java virtual machine is a stack machine and instruction folding is a technique to reduce the redundant stack operations. In this paper, a simple instruction folding algorithm is proposed for a Java processor named jHISC, where bytecodes are classified into five categories and the operation results of incomplete folding groups are hold for further folding. In the benchmark JVM98, with respect to all stack operations, the percentage of the eliminated P and C type instructions varies from 87% to 98% and the average is about 93%. The reduced instructions are between 37% and 50% of all operations and the average is 44%. © IFIP International Federation for Information Processing 2007.
KW - Bytecode
KW - Instruction folding
KW - Java processor
KW - Java virtual machine
UR - http://www.scopus.com/inward/record.url?scp=38349045426&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-38349045426&origin=recordpage
U2 - 10.1007/978-3-540-74784-0_42
DO - 10.1007/978-3-540-74784-0_42
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 9783540747833
VL - 4672 LNCS
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 415
EP - 424
BT - Network and Parallel Computing
PB - Springer Verlag
T2 - 2007 IFIP International Conference on Network and Parallel Computing, NPC 2007
Y2 - 18 September 2007 through 21 September 2007
ER -