TY - JOUR
T1 - Amplifier linearization using compact microstrip resonant cell - Theory and experiment
AU - Yum, Tsz Yin
AU - Xue, Quan
AU - Chan, Chi Hou
PY - 2004/3
Y1 - 2004/3
N2 - This paper presents a novel technique for reducing the intermodulation distortions (IMDs) in power amplifiers. In this method, both second- and third-harmonic components generated by the transistor are reflected back simultaneously by the compact microstrip resonant cell (CMRC) at the input port with proper phases to mix with the fundamental signal for the reduction of IMDs. A rigorous mathematical analysis on the effectiveness of multiharmonic reflections has been formulated and derived using the Volterra series. Moreover, the delay mismatch factor of the proposed method is analytically studied and the result shows that a better tolerance to the delay error can be achieved by using CMRC circuitry. Standard two-tone test measurements reveal 32- and 22-dB reductions for the third-order IMD and fifth-order IMD, respectively, without affecting the fundamental signal at 2.45 GHz. Meanwhile, the proposed approach gives a peak power added efficiency of 53% with 11.5 dB transducer grain and 15 dBm output power for a single-stage SiGe bipolar junction transistor. The adjacent channel power ratio (ACPR) is -55 dBc for a data rate of 384-kb/s quadrature phase shift keyed modulated signal with 2-MHz spanning bandwidth, and this ACPR is maintained for a broad range of output power level.
AB - This paper presents a novel technique for reducing the intermodulation distortions (IMDs) in power amplifiers. In this method, both second- and third-harmonic components generated by the transistor are reflected back simultaneously by the compact microstrip resonant cell (CMRC) at the input port with proper phases to mix with the fundamental signal for the reduction of IMDs. A rigorous mathematical analysis on the effectiveness of multiharmonic reflections has been formulated and derived using the Volterra series. Moreover, the delay mismatch factor of the proposed method is analytically studied and the result shows that a better tolerance to the delay error can be achieved by using CMRC circuitry. Standard two-tone test measurements reveal 32- and 22-dB reductions for the third-order IMD and fifth-order IMD, respectively, without affecting the fundamental signal at 2.45 GHz. Meanwhile, the proposed approach gives a peak power added efficiency of 53% with 11.5 dB transducer grain and 15 dBm output power for a single-stage SiGe bipolar junction transistor. The adjacent channel power ratio (ACPR) is -55 dBc for a data rate of 384-kb/s quadrature phase shift keyed modulated signal with 2-MHz spanning bandwidth, and this ACPR is maintained for a broad range of output power level.
KW - Amplifiers
KW - Compact microstrip resonant cell (CMRC)
KW - Harmonics suppression
KW - Intermodulation
KW - Linearization
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UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-1842527407&origin=recordpage
U2 - 10.1109/TMTT.2004.823575
DO - 10.1109/TMTT.2004.823575
M3 - RGC 21 - Publication in refereed journal
SN - 0018-9480
VL - 52
SP - 927
EP - 934
JO - IEEE Transactions on Microwave Theory and Techniques
JF - IEEE Transactions on Microwave Theory and Techniques
IS - 3
ER -