TY - GEN
T1 - Algorithm for the virtual vectors modulation in three-level inverters with a voltage-balance control loop
AU - Pou, Josep
AU - Rodríguez, Pedro
AU - Sala, Vicenç
AU - Busquets-Monge, Sergio
AU - Boroyevich, Dushan
N1 - Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].
PY - 2005
Y1 - 2005
N2 - The modulation strategy based on virtual vectors can remove the low-frequency voltage oscillation that appears in the neutral point of the three-level inverter. However, this strategy has no natural voltage balancing. This work presents a novel space-vector modulation algorithm that includes voltage-balancing control and therefore can remove any possible imbalance. Since the algorithm takes advantage of symmetry in the space-vector diagram, it can be processed quickly in a digital-signal processor. The proposed method is verified by simulation and experiment.
AB - The modulation strategy based on virtual vectors can remove the low-frequency voltage oscillation that appears in the neutral point of the three-level inverter. However, this strategy has no natural voltage balancing. This work presents a novel space-vector modulation algorithm that includes voltage-balancing control and therefore can remove any possible imbalance. Since the algorithm takes advantage of symmetry in the space-vector diagram, it can be processed quickly in a digital-signal processor. The proposed method is verified by simulation and experiment.
KW - Converter control
KW - Modulation strategy
KW - Multilevel converters
KW - Pulse width modulation (PWM)
KW - Three-phase system
UR - http://www.scopus.com/inward/record.url?scp=33947706355&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-33947706355&origin=recordpage
U2 - 10.1109/epe.2005.219638
DO - 10.1109/epe.2005.219638
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 9075815085
SN - 9789075815085
VL - 2005
T3 - 2005 European Conference on Power Electronics and Applications
BT - 2005 European Conference on Power Electronics and Applications
PB - IEEE Computer Society
T2 - 2005 European Conference on Power Electronics and Applications
Y2 - 11 September 2005 through 14 September 2005
ER -