A study on split-drain MAGFET channel boundary charge trapping based on numerical simulation

Shuk-Fun Lai; Wing-Shan Tam; Chi-Wah Kok; Hei Wong

doi:10.1109/EDSSC.2017.8333264

A study on split-drain MAGFET channel boundary charge trapping based on numerical simulation

Shuk-Fun Lai, Wing-Shan Tam, Chi-Wah Kok, Hei Wong

Department of Electrical Engineering

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

Abstract

In this paper, the linearity of the magnetic sensitivity of split-drain magnetic field effect transistor (SSD-MAGFET) is studied, where experimental results have shown that the magnetic sensitivity over wide magnetic field strength shows a piecewise linear response with respect to applied magnetic field strength. Furthermore, the experimental results also showed that the piecewise linear response depends on the sector angle of the SSD-MAGFET. Previous studies have attributed these properties to the channel boundary trapping effect. The underlying charge trapping behavior are investigated by three-dimensional numerical device simulation. The simulation results match well with experimental measurements, which is strong evidence that the the physics of piecewise linear magnetic sensitivity of SSD-MAGFET is attributed to the channel boundary charge trapping.

Original language	English
Title of host publication	IEEE EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits
Publisher	IEEE
ISBN (Electronic)	978-1-5386-2907-9
DOIs	https://doi.org/10.1109/EDSSC.2017.8333264
Publication status	Published - Oct 2017
Event	13th IEEE International Conference on Electron Devices and Solid-State Circuits (IEEE EDSSC 2017) - National Tsing Hua University, Hsinchu, Taiwan, China Duration: 18 Oct 2017 → 20 Oct 2017 Conference number: 13 http://www2.ess.nthu.edu.tw/edssc2017/ https://ieeexplore.ieee.org/xpl/conhome/8118202/proceeding

Conference

Conference	13th IEEE International Conference on Electron Devices and Solid-State Circuits (IEEE EDSSC 2017)
Abbreviated title	IEEE EDSSC
Place	Taiwan, China
City	Hsinchu
Period	18/10/17 → 20/10/17
Internet address	http://www2.ess.nthu.edu.tw/edssc2017/ https://ieeexplore.ieee.org/xpl/conhome/8118202/proceeding

Research Keywords

Charge Trapping
MAGFET
Substrate Current

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10.1109/EDSSC.2017.8333264

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@inproceedings{8e4a04fcea7c4f169fc369e6f02798c3,

title = "A study on split-drain MAGFET channel boundary charge trapping based on numerical simulation",

abstract = "In this paper, the linearity of the magnetic sensitivity of split-drain magnetic field effect transistor (SSD-MAGFET) is studied, where experimental results have shown that the magnetic sensitivity over wide magnetic field strength shows a piecewise linear response with respect to applied magnetic field strength. Furthermore, the experimental results also showed that the piecewise linear response depends on the sector angle of the SSD-MAGFET. Previous studies have attributed these properties to the channel boundary trapping effect. The underlying charge trapping behavior are investigated by three-dimensional numerical device simulation. The simulation results match well with experimental measurements, which is strong evidence that the the physics of piecewise linear magnetic sensitivity of SSD-MAGFET is attributed to the channel boundary charge trapping.",

keywords = "Charge Trapping, MAGFET, Substrate Current",

author = "Shuk-Fun Lai and Wing-Shan Tam and Chi-Wah Kok and Hei Wong",

year = "2017",

month = oct,

doi = "10.1109/EDSSC.2017.8333264",

language = "English",

booktitle = "IEEE EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits",

publisher = "IEEE",

address = "United States",

note = "13th IEEE International Conference on Electron Devices and Solid-State Circuits (IEEE EDSSC 2017), IEEE EDSSC ; Conference date: 18-10-2017 Through 20-10-2017",

url = "http://www2.ess.nthu.edu.tw/edssc2017/, https://ieeexplore.ieee.org/xpl/conhome/8118202/proceeding",

}

Lai, S-F, Tam, W-S, Kok, C-W & Wong, H 2017, A study on split-drain MAGFET channel boundary charge trapping based on numerical simulation. in IEEE EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits. IEEE, 13th IEEE International Conference on Electron Devices and Solid-State Circuits (IEEE EDSSC 2017), Hsinchu, Taiwan, China, 18/10/17. https://doi.org/10.1109/EDSSC.2017.8333264

A study on split-drain MAGFET channel boundary charge trapping based on numerical simulation. / Lai, Shuk-Fun; Tam, Wing-Shan; Kok, Chi-Wah et al.
IEEE EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits. IEEE, 2017.

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - A study on split-drain MAGFET channel boundary charge trapping based on numerical simulation

AU - Lai, Shuk-Fun

AU - Tam, Wing-Shan

AU - Kok, Chi-Wah

AU - Wong, Hei

N1 - Conference code: 13

PY - 2017/10

Y1 - 2017/10

N2 - In this paper, the linearity of the magnetic sensitivity of split-drain magnetic field effect transistor (SSD-MAGFET) is studied, where experimental results have shown that the magnetic sensitivity over wide magnetic field strength shows a piecewise linear response with respect to applied magnetic field strength. Furthermore, the experimental results also showed that the piecewise linear response depends on the sector angle of the SSD-MAGFET. Previous studies have attributed these properties to the channel boundary trapping effect. The underlying charge trapping behavior are investigated by three-dimensional numerical device simulation. The simulation results match well with experimental measurements, which is strong evidence that the the physics of piecewise linear magnetic sensitivity of SSD-MAGFET is attributed to the channel boundary charge trapping.

AB - In this paper, the linearity of the magnetic sensitivity of split-drain magnetic field effect transistor (SSD-MAGFET) is studied, where experimental results have shown that the magnetic sensitivity over wide magnetic field strength shows a piecewise linear response with respect to applied magnetic field strength. Furthermore, the experimental results also showed that the piecewise linear response depends on the sector angle of the SSD-MAGFET. Previous studies have attributed these properties to the channel boundary trapping effect. The underlying charge trapping behavior are investigated by three-dimensional numerical device simulation. The simulation results match well with experimental measurements, which is strong evidence that the the physics of piecewise linear magnetic sensitivity of SSD-MAGFET is attributed to the channel boundary charge trapping.

KW - Charge Trapping

KW - MAGFET

KW - Substrate Current

UR - http://www.scopus.com/inward/record.url?scp=85045505778&partnerID=8YFLogxK

UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-85045505778&origin=recordpage

U2 - 10.1109/EDSSC.2017.8333264

DO - 10.1109/EDSSC.2017.8333264

M3 - RGC 32 - Refereed conference paper (with host publication)

BT - IEEE EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits

PB - IEEE

T2 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits (IEEE EDSSC 2017)

Y2 - 18 October 2017 through 20 October 2017

ER -

A study on split-drain MAGFET channel boundary charge trapping based on numerical simulation

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