A parallel FET linearizer with complex capacitance

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

1 Scopus Citations
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Detail(s)

Original languageEnglish
Pages (from-to)485-487
Journal / PublicationMicrowave and Optical Technology Letters
Volume44
Issue number5
Publication statusPublished - 5 Mar 2005

Abstract

Linearization of the gate-source capacitance in a GaAs FET using a parallel reverse biased gate-source junction and complex capacitance is proposed. This method offers a simple and low-cost solution in reducing AM/PM distortion. An analysis for maximizing the performance of this linearizer is also presented. © 2005 Wiley Periodicals, Inc.

Research Area(s)

  • Intermodulation distortion, Linearization, RF power amplifier, Spectral regrowth

Citation Format(s)

A parallel FET linearizer with complex capacitance. / Lo, Wai Keung; Chan, Wing Shing; Li, Chung Wai.

In: Microwave and Optical Technology Letters, Vol. 44, No. 5, 05.03.2005, p. 485-487.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review