A novel silicon-embedded coreless transformer for isolated DC-DC converter application

Rongxiang Wu; Johnny K. O. Sin; S. Y. Hui

doi:10.1109/ISPSD.2011.5890863

A novel silicon-embedded coreless transformer for isolated DC-DC converter application

Rongxiang Wu, Johnny K. O. Sin, S. Y. Hui

Department of Electrical Engineering

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

19 Citations (Scopus)

Abstract

In this paper, a novel silicon-embedded coreless transformer (SECT) is proposed and demonstrated for isolated dc-dc converter applications. By embedding two interleaved thick Cu coils in the bottom layer of the Si substrate, the designed 2 mm² SECT can achieve a maximum transformer efficiency of 85% at 50 MHz. Compared to the on-silicon coreless power transformer reported earlier for 0.5 W isolated dc-dc conversion at 170 MHz with a transformer efficiency of over 70%, the much lower operating frequency of the SECT allows the power losses of the power MOSFETs and Schottky diodes to be reduced by around 50%, leading to a converter loss reduction of 38%. Since only 4 vias are opened at the top layer of the substrate, most of the top layer of the substrate can be used for power IC implementation to achieve efficient monolithic integration. Experimental results show that the SECT provides a maximum transformer efficiency of 73% at 50 MHz, which is lower than expected and due to the non-optimized isolation oxide used. © 2011 IEEE.

Original language	English
Title of host publication	ISPSD 2011 - Proceedings of the 23rd International Symposium on Power Semiconductor Devices and ICs
Pages	352-355
DOIs	https://doi.org/10.1109/ISPSD.2011.5890863
Publication status	Published - 2011
Event	23rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2011 - San Diego, CA, United States Duration: 23 May 2011 → 26 May 2011

Publication series

Name	Proceedings of the International Symposium on Power Semiconductor Devices and ICs
ISSN (Print)	1063-6854

Conference

Conference	23rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2011
Place	United States
City	San Diego, CA
Period	23/05/11 → 26/05/11

Bibliographical note

Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].

Funding

This work was partially supported by the City University of Hong Kong under the Strategy Research Grant 7002218

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Wu, R., Sin, J. K. O., & Hui, S. Y. (2011). A novel silicon-embedded coreless transformer for isolated DC-DC converter application. In ISPSD 2011 - Proceedings of the 23rd International Symposium on Power Semiconductor Devices and ICs (pp. 352-355). Article 5890863 (Proceedings of the International Symposium on Power Semiconductor Devices and ICs). https://doi.org/10.1109/ISPSD.2011.5890863

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title = "A novel silicon-embedded coreless transformer for isolated DC-DC converter application",

abstract = "In this paper, a novel silicon-embedded coreless transformer (SECT) is proposed and demonstrated for isolated dc-dc converter applications. By embedding two interleaved thick Cu coils in the bottom layer of the Si substrate, the designed 2 mm2 SECT can achieve a maximum transformer efficiency of 85% at 50 MHz. Compared to the on-silicon coreless power transformer reported earlier for 0.5 W isolated dc-dc conversion at 170 MHz with a transformer efficiency of over 70%, the much lower operating frequency of the SECT allows the power losses of the power MOSFETs and Schottky diodes to be reduced by around 50%, leading to a converter loss reduction of 38%. Since only 4 vias are opened at the top layer of the substrate, most of the top layer of the substrate can be used for power IC implementation to achieve efficient monolithic integration. Experimental results show that the SECT provides a maximum transformer efficiency of 73% at 50 MHz, which is lower than expected and due to the non-optimized isolation oxide used. {\textcopyright} 2011 IEEE.",

author = "Rongxiang Wu and Sin, {Johnny K. O.} and Hui, {S. Y.}",

note = "Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].; 23rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2011 ; Conference date: 23-05-2011 Through 26-05-2011",

year = "2011",

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language = "English",

isbn = "9781424484225",

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Wu, R, Sin, JKO & Hui, SY 2011, A novel silicon-embedded coreless transformer for isolated DC-DC converter application. in ISPSD 2011 - Proceedings of the 23rd International Symposium on Power Semiconductor Devices and ICs., 5890863, Proceedings of the International Symposium on Power Semiconductor Devices and ICs, pp. 352-355, 23rd International Symposium on Power Semiconductor Devices and ICs, ISPSD 2011, San Diego, CA, United States, 23/05/11. https://doi.org/10.1109/ISPSD.2011.5890863

A novel silicon-embedded coreless transformer for isolated DC-DC converter application. / Wu, Rongxiang; Sin, Johnny K. O.; Hui, S. Y.
ISPSD 2011 - Proceedings of the 23rd International Symposium on Power Semiconductor Devices and ICs. 2011. p. 352-355 5890863 (Proceedings of the International Symposium on Power Semiconductor Devices and ICs).

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

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N1 - Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].

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N2 - In this paper, a novel silicon-embedded coreless transformer (SECT) is proposed and demonstrated for isolated dc-dc converter applications. By embedding two interleaved thick Cu coils in the bottom layer of the Si substrate, the designed 2 mm2 SECT can achieve a maximum transformer efficiency of 85% at 50 MHz. Compared to the on-silicon coreless power transformer reported earlier for 0.5 W isolated dc-dc conversion at 170 MHz with a transformer efficiency of over 70%, the much lower operating frequency of the SECT allows the power losses of the power MOSFETs and Schottky diodes to be reduced by around 50%, leading to a converter loss reduction of 38%. Since only 4 vias are opened at the top layer of the substrate, most of the top layer of the substrate can be used for power IC implementation to achieve efficient monolithic integration. Experimental results show that the SECT provides a maximum transformer efficiency of 73% at 50 MHz, which is lower than expected and due to the non-optimized isolation oxide used. © 2011 IEEE.

AB - In this paper, a novel silicon-embedded coreless transformer (SECT) is proposed and demonstrated for isolated dc-dc converter applications. By embedding two interleaved thick Cu coils in the bottom layer of the Si substrate, the designed 2 mm2 SECT can achieve a maximum transformer efficiency of 85% at 50 MHz. Compared to the on-silicon coreless power transformer reported earlier for 0.5 W isolated dc-dc conversion at 170 MHz with a transformer efficiency of over 70%, the much lower operating frequency of the SECT allows the power losses of the power MOSFETs and Schottky diodes to be reduced by around 50%, leading to a converter loss reduction of 38%. Since only 4 vias are opened at the top layer of the substrate, most of the top layer of the substrate can be used for power IC implementation to achieve efficient monolithic integration. Experimental results show that the SECT provides a maximum transformer efficiency of 73% at 50 MHz, which is lower than expected and due to the non-optimized isolation oxide used. © 2011 IEEE.

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ER -

A novel silicon-embedded coreless transformer for isolated DC-DC converter application

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