A NOVEL SILICIDED SHALLOW JUNCTION TECHNOLOGY FOR CMOS VLSI

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review

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Author(s)

  • D.L. KWONG
  • Y.H. KU
  • S.K. LEE
  • N.S. ALVI
  • Y. ZHOU
  • J.M. WHITE

Detail(s)

Original languageEnglish
Title of host publicationProceedings of MRS Meetings
Subtitle of host publicationSymposium F – Materials Issues in Silicon Integrated Circuit Processing
Pages379-385
Volume71
ISBN (Electronic)1946-4274
Publication statusPublished - Apr 1986
Externally publishedYes

Conference

Title1986 MRS Spring Meeting
PlaceUnited States
Period15 - 18 April 1986

Abstract

A novel technique for the fabrication of shallow, silicided p+-n junctions with excellent electrical characteristics has been developed. The technique utilizes the ion implantation of dopants into silicide layers formed by ion-beam mixing with Si ions and low temperature annealing, and the subsequent drive-in of implanted dopants into the Si substrates to form shallow junctions. This technique can be easily applied to the fabrication of MOSFETs in a self-aligned fashion, and can have a significant impact on CMOS VLSI technology.

Citation Format(s)

A NOVEL SILICIDED SHALLOW JUNCTION TECHNOLOGY FOR CMOS VLSI. / KWONG, D.L.; KU, Y.H.; LEE, S.K.; ALVI, N.S.; CHU, P.; ZHOU, Y.; WHITE, J.M.

Proceedings of MRS Meetings: Symposium F – Materials Issues in Silicon Integrated Circuit Processing . Vol. 71 1986. p. 379-385.

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review