A Novel Gate Boosting Circuit or 2-Phase High Voltage CMOS Charge Pump

Oi-Ying Wong; Wing-Shan Tam; Chi-Wah Kok; Hei Wong

A Novel Gate Boosting Circuit or 2-Phase High Voltage CMOS Charge Pump

Oi-Ying Wong^*, Wing-Shan Tam, Chi-Wah Kok, Hei Wong

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

Abstract

A novel gate boosting circuit is proposed for general switched-capacitor charge pump. The proposed circuit only requires two small transistors to generate the necessary driving signal from a clock signal that swings between 0V to V-DD for closing and opening the charge transfer switches in the charge pump. As a result, the proposed gate boosting circuit reduces the design complexity and silicon area. Moreover, the regular structure eases the layout and increases the reliability of the implemented charge pump. A 3x Makowski charge pump implemented by the proposed gate boosting element is simulated. An output voltage closed to the ideal one shows that the proposed gate boosting circuit is suitable to be used in designing high efficiency charge pumps.

Original language	English
Title of host publication	2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009)
Publisher	IEEE
Pages	250-+
ISBN (Print)	978-1-4244-4297-3
Publication status	Published - 2009
Event	IEEE International Conference of Electron Devices and Solid-State Circuits - Xian Duration: 25 Dec 2009 → 27 Dec 2009

Conference

Conference	IEEE International Conference of Electron Devices and Solid-State Circuits
City	Xian
Period	25/12/09 → 27/12/09

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@inproceedings{b599af24293646a08c5d3a948119ee57,

title = "A Novel Gate Boosting Circuit or 2-Phase High Voltage CMOS Charge Pump",

abstract = "A novel gate boosting circuit is proposed for general switched-capacitor charge pump. The proposed circuit only requires two small transistors to generate the necessary driving signal from a clock signal that swings between 0V to V-DD for closing and opening the charge transfer switches in the charge pump. As a result, the proposed gate boosting circuit reduces the design complexity and silicon area. Moreover, the regular structure eases the layout and increases the reliability of the implemented charge pump. A 3x Makowski charge pump implemented by the proposed gate boosting element is simulated. An output voltage closed to the ideal one shows that the proposed gate boosting circuit is suitable to be used in designing high efficiency charge pumps.",

author = "Oi-Ying Wong and Wing-Shan Tam and Chi-Wah Kok and Hei Wong",

year = "2009",

language = "English",

isbn = "978-1-4244-4297-3",

pages = "250--+",

booktitle = "2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009)",

publisher = "IEEE",

address = "United States",

note = "IEEE International Conference of Electron Devices and Solid-State Circuits ; Conference date: 25-12-2009 Through 27-12-2009",

}

A Novel Gate Boosting Circuit or 2-Phase High Voltage CMOS Charge Pump. / Wong, Oi-Ying; Tam, Wing-Shan; Kok, Chi-Wah et al.
2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009). IEEE, 2009. p. 250-+.

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - A Novel Gate Boosting Circuit or 2-Phase High Voltage CMOS Charge Pump

AU - Wong, Oi-Ying

AU - Tam, Wing-Shan

AU - Kok, Chi-Wah

AU - Wong, Hei

PY - 2009

Y1 - 2009

N2 - A novel gate boosting circuit is proposed for general switched-capacitor charge pump. The proposed circuit only requires two small transistors to generate the necessary driving signal from a clock signal that swings between 0V to V-DD for closing and opening the charge transfer switches in the charge pump. As a result, the proposed gate boosting circuit reduces the design complexity and silicon area. Moreover, the regular structure eases the layout and increases the reliability of the implemented charge pump. A 3x Makowski charge pump implemented by the proposed gate boosting element is simulated. An output voltage closed to the ideal one shows that the proposed gate boosting circuit is suitable to be used in designing high efficiency charge pumps.

AB - A novel gate boosting circuit is proposed for general switched-capacitor charge pump. The proposed circuit only requires two small transistors to generate the necessary driving signal from a clock signal that swings between 0V to V-DD for closing and opening the charge transfer switches in the charge pump. As a result, the proposed gate boosting circuit reduces the design complexity and silicon area. Moreover, the regular structure eases the layout and increases the reliability of the implemented charge pump. A 3x Makowski charge pump implemented by the proposed gate boosting element is simulated. An output voltage closed to the ideal one shows that the proposed gate boosting circuit is suitable to be used in designing high efficiency charge pumps.

M3 - RGC 32 - Refereed conference paper (with host publication)

SN - 978-1-4244-4297-3

SP - 250-+

BT - 2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009)

PB - IEEE

T2 - IEEE International Conference of Electron Devices and Solid-State Circuits

Y2 - 25 December 2009 through 27 December 2009

ER -

A Novel Gate Boosting Circuit or 2-Phase High Voltage CMOS Charge Pump

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