TY - GEN
T1 - A new motion control hardware architecture with FPGA-based IC design for robotic manipulators
AU - Shao, Xiaoyin
AU - Dong, Sun
AU - Mills, James K.
PY - 2006
Y1 - 2006
N2 - In this paper, a new motion control hardware architecture is proposed for improved motion performance of robotic manipulators during high speed motion. The main idea is to remove the servo control loop from the DSP (Digital Signal Processor) to a FPGA (Field Programmable Gate Array), and utilize the high speed hardwired logic of the FPGA to enhance the computation capability and relieve the computing load on the DSP. The control algorithm is partitioned into a linear portion and a nonlinear portion. The linear portion with position/velocity feedback represents the major control loop and is implemented in the FPGA. The nonlinear portion acts as dynamic compensation to the linear portion to perform complex modeling related calculations, and is implemented in the DSP. A new FPGA-based motion control IC is designed to realize this new control hardware structure. Experiments were conducted on a Yamaha robot manipulator to compare new control architecture and the existing one, when the same control algorithm was used. Experimental results demonstrate that the proposed new control architecture exhibits much improved motion performance especially during high-speed motions. ©2006 IEEE.
AB - In this paper, a new motion control hardware architecture is proposed for improved motion performance of robotic manipulators during high speed motion. The main idea is to remove the servo control loop from the DSP (Digital Signal Processor) to a FPGA (Field Programmable Gate Array), and utilize the high speed hardwired logic of the FPGA to enhance the computation capability and relieve the computing load on the DSP. The control algorithm is partitioned into a linear portion and a nonlinear portion. The linear portion with position/velocity feedback represents the major control loop and is implemented in the FPGA. The nonlinear portion acts as dynamic compensation to the linear portion to perform complex modeling related calculations, and is implemented in the DSP. A new FPGA-based motion control IC is designed to realize this new control hardware structure. Experiments were conducted on a Yamaha robot manipulator to compare new control architecture and the existing one, when the same control algorithm was used. Experimental results demonstrate that the proposed new control architecture exhibits much improved motion performance especially during high-speed motions. ©2006 IEEE.
KW - FPGA
KW - IC design
KW - Motion control
KW - Robotic manipulator
UR - https://www.scopus.com/pages/publications/33845668036
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-33845668036&origin=recordpage
U2 - 10.1109/ROBOT.2006.1642239
DO - 10.1109/ROBOT.2006.1642239
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 0780395069
SN - 9780780395060
VL - 2006
SP - 3520
EP - 3525
BT - Proceedings - IEEE International Conference on Robotics and Automation
T2 - 2006 IEEE International Conference on Robotics and Automation, ICRA 2006
Y2 - 15 May 2006 through 19 May 2006
ER -