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A new approach to characterize and predict lifetime of deep-submicron nMOS devices

  • Zhi Cui
  • , Juin J. Liou
  • , Yun Yue
  • , Hei Wong

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

Experimental results indicated that the widely used power-law model for lifetime estimation is inaccurate for deep submicron (<0.25 μm) devices. It underestimates the lifetime for large substrate hot-carrier stressing. This observation is attributed to current components that do not induce device degradation, such as the gate tunneling current and base current of parasitic bipolar transistor, in substrate current and gate current. A better lifetime prediction method is proposed for the deep-submicron devices. © 2004 IEEE.
Original languageEnglish
Title of host publicationInternational Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT
Pages787-791
Volume2
Publication statusPublished - 2004
Event7th International Conference on Solid-State and Integrated Circuits Technology (ICSICT 2004) - Beijing, China
Duration: 18 Oct 200421 Oct 2004

Publication series

Name
Volume2

Conference

Conference7th International Conference on Solid-State and Integrated Circuits Technology (ICSICT 2004)
Abbreviated titleICSICT 2004
PlaceChina
CityBeijing
Period18/10/0421/10/04

Research Keywords

  • Gate current
  • Lifetime model
  • MOS devices
  • Reliability
  • Substrate current

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