A method to reduce process-related sensitivity in sub-threshold ICs and its circuit implementation

Luo Hao; Han Yan; Ray C.C. Cheung

doi:10.1109/PRIMEASIA.2010.5604922

A method to reduce process-related sensitivity in sub-threshold ICs and its circuit implementation

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

Abstract

This paper provides a novel bulk-compensated technique used in sub-threshold integrated circuits (ICs), solving the problem that MOS transistors in the sub-threshold area are extremely sensitive to the issue of process variation. The bulk-compensated technique builds up a unique "detecting-feedback" loop, and achieves an effective compensation for the process-related fluctuation of MOS transistors through bulk potential modulation. A simple circuit implementation of the proposed technique is also presented, which is implemented in 0.13 μm CMOS mixed-signal process. With the introduction of the bulk-compensated circuit, the sensitivity of MOS transistors to process variation in the sub-threshold area is greatly reduced.

Original language	English
Title of host publication	PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics
Publisher	IEEE Computer Society
Pages	214-216
ISBN (Print)	9781424467372
DOIs	https://doi.org/10.1109/PRIMEASIA.2010.5604922
Publication status	Published - 22 Sept 2010
Event	2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010 - Shanghai, China Duration: 22 Sept 2010 → 24 Sept 2010

Conference

Conference	2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010
Place	China
City	Shanghai
Period	22/09/10 → 24/09/10

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10.1109/PRIMEASIA.2010.5604922

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@inproceedings{4cfbecba70034250a1daacf220166124,

title = "A method to reduce process-related sensitivity in sub-threshold ICs and its circuit implementation",

abstract = "This paper provides a novel bulk-compensated technique used in sub-threshold integrated circuits (ICs), solving the problem that MOS transistors in the sub-threshold area are extremely sensitive to the issue of process variation. The bulk-compensated technique builds up a unique {"}detecting-feedback{"} loop, and achieves an effective compensation for the process-related fluctuation of MOS transistors through bulk potential modulation. A simple circuit implementation of the proposed technique is also presented, which is implemented in 0.13 μm CMOS mixed-signal process. With the introduction of the bulk-compensated circuit, the sensitivity of MOS transistors to process variation in the sub-threshold area is greatly reduced.",

author = "Luo Hao and Han Yan and Cheung, {Ray C.C.}",

year = "2010",

month = sep,

day = "22",

doi = "10.1109/PRIMEASIA.2010.5604922",

language = "English",

isbn = "9781424467372",

pages = "214--216",

booktitle = "PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics",

publisher = "IEEE Computer Society",

address = "United States",

note = "2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010 ; Conference date: 22-09-2010 Through 24-09-2010",

}

Hao, L, Yan, H & Cheung, RCC 2010, A method to reduce process-related sensitivity in sub-threshold ICs and its circuit implementation. in PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics., 5604922, IEEE Computer Society, pp. 214-216, 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010, Shanghai, China, 22/09/10. https://doi.org/10.1109/PRIMEASIA.2010.5604922

A method to reduce process-related sensitivity in sub-threshold ICs and its circuit implementation. / Hao, Luo; Yan, Han; Cheung, Ray C.C.
PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics. IEEE Computer Society, 2010. p. 214-216 5604922.

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - A method to reduce process-related sensitivity in sub-threshold ICs and its circuit implementation

AU - Hao, Luo

AU - Yan, Han

AU - Cheung, Ray C.C.

PY - 2010/9/22

Y1 - 2010/9/22

N2 - This paper provides a novel bulk-compensated technique used in sub-threshold integrated circuits (ICs), solving the problem that MOS transistors in the sub-threshold area are extremely sensitive to the issue of process variation. The bulk-compensated technique builds up a unique "detecting-feedback" loop, and achieves an effective compensation for the process-related fluctuation of MOS transistors through bulk potential modulation. A simple circuit implementation of the proposed technique is also presented, which is implemented in 0.13 μm CMOS mixed-signal process. With the introduction of the bulk-compensated circuit, the sensitivity of MOS transistors to process variation in the sub-threshold area is greatly reduced.

AB - This paper provides a novel bulk-compensated technique used in sub-threshold integrated circuits (ICs), solving the problem that MOS transistors in the sub-threshold area are extremely sensitive to the issue of process variation. The bulk-compensated technique builds up a unique "detecting-feedback" loop, and achieves an effective compensation for the process-related fluctuation of MOS transistors through bulk potential modulation. A simple circuit implementation of the proposed technique is also presented, which is implemented in 0.13 μm CMOS mixed-signal process. With the introduction of the bulk-compensated circuit, the sensitivity of MOS transistors to process variation in the sub-threshold area is greatly reduced.

U2 - 10.1109/PRIMEASIA.2010.5604922

DO - 10.1109/PRIMEASIA.2010.5604922

M3 - RGC 32 - Refereed conference paper (with host publication)

SN - 9781424467372

SP - 214

EP - 216

BT - PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics

PB - IEEE Computer Society

T2 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010

Y2 - 22 September 2010 through 24 September 2010

ER -

A method to reduce process-related sensitivity in sub-threshold ICs and its circuit implementation

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