A light-weighted software-controlled cache for PCM-based main memory systems

Hung-Sheng Chang, Yuan-Hao Chang, Tei-Wei Kuo, Hsiang-Pang Li

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

13 Citations (Scopus)

Abstract

The replacement of DRAM with non-volatile memory relies on solutions to resolve the wear leveling and slow write problems. Different from the past work in compiler-assisted optimization or joint DRAM-PCM management strategies, we explore a light-weighted software-controlled DRAM cache design for the non-volatile-memory-based main memory. The run-time overheads in the management of the DRAM cache is minimized by utilizing the information from a miss of the translation lookaside buffer (TLB) or the cache. Experiments were conducted based on a series of the well-known benchmarks to evaluate the effectiveness of the proposed design, for which the results are very encouraging.
Original languageEnglish
Title of host publication2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - Digest of Technical Papers
PublisherIEEE
Pages22-29
ISBN (Print)978-1-4673-8388-2
DOIs
Publication statusPublished - Nov 2015
Externally publishedYes
Event34th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015 - Austin, United States
Duration: 2 Nov 20156 Nov 2015

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, ICCAD

Conference

Conference34th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015
Country/TerritoryUnited States
CityAustin
Period2/11/156/11/15

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