Abstract
We present a single-chip array of 100 biologically-based electronic neuron models interconnected to each other and the outside environment through 30,000 synapses. The chip was fabricated in a standard 350 nm CMOS IC process. Our approach used dense circuit models of synaptic behavior, including biological computation and learning, as well as transistor channel models. We use Address-Event Representation (AER) spike communication for inputs and outputs to this IC. We present the IC architecture and infrastructure, including IC chip, configuration tools, and testing platform. We present measurement of small network of neurons, measurement of STDP neuron dynamics, and measurement from a compiled spiking neuron WTA topology, all compiled into this IC. © 2012 IEEE.
| Original language | English |
|---|---|
| Article number | 6218734 |
| Pages (from-to) | 71-81 |
| Journal | IEEE Transactions on Biomedical Circuits and Systems |
| Volume | 7 |
| Issue number | 1 |
| DOIs | |
| Publication status | Published - 2013 |
| Externally published | Yes |
Bibliographical note
Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].Research Keywords
- Electrical implementation of neurobiology
- neuromorphic engineering
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