A Framework for Solving Logical Topology Design Problems Within Constrained Computation Time

Andrew Zalesky, Hai Le Vu, Moshe Zukerman, Iradj Ouveysi

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

5 Citations (Scopus)

Abstract

We present a framework for solving logical topology design (LTD) problems in a constrained amount of computation time. Our framework uses a search space dimensionality (SSD) reduction technique that exploits a tradeoff between computation time and solution quality. We have demonstrated that our framework offers improved solution quality in comparison to an existing SSD reduction technique reported in the literature.
Original languageEnglish
Pages (from-to)499-501
JournalIEEE Communications Letters
Volume7
Issue number10
DOIs
Publication statusPublished - Oct 2003
Externally publishedYes

Research Keywords

  • Logical topology design
  • Mixed integer linear programming
  • Optical networks
  • Routing

Fingerprint

Dive into the research topics of 'A Framework for Solving Logical Topology Design Problems Within Constrained Computation Time'. Together they form a unique fingerprint.

Cite this